<div dir="ltr"><pre style="white-space:pre-wrap;color:rgb(0,0,0)">>>you need a bunch of blobs (of course), most importantly fitimage.bin and fsp.
>>Please use <a href="https://review.coreboot.org/#/c/18479/3">https://review.coreboot.org/#/c/18479/3</a> as starting point.
>>That is for Leafhill. But once you apply that patch, select mainboard
>>intel/leafhill in 'make nconfig', put the sacred blobs in the designated
>>location and 'make' should give you flashable coreboot.rom.
</pre><pre style="white-space:pre-wrap;color:rgb(0,0,0)"><br></pre><pre style="white-space:pre-wrap;color:rgb(0,0,0)">I pulled the leafhill patches and yes I get options to specify FSP when selected leafhill. However not clear about the difference between FSP-M.fv and FSP-S.fv. I have FSP.bsf and FSP.fd files for FSP. Can you please let me know how to create required FSP blob from FSP.bsf and FSP.fd files?<br></pre><div><br></div></div><div class="gmail_extra"><br><div class="gmail_quote">On Sat, Feb 25, 2017 at 10:49 AM, Gailu Singh <span dir="ltr"><<a href="mailto:gailu96@gmail.com" target="_blank">gailu96@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">Hi Experts,<div><br></div><div>I have built coreboot image for Apollo Lake and trying to boot Oxbohill CRB but no console or display at HDMI port.</div><div><br></div><div>My coreboot.rom details</div><div><br></div><div><div>Name Offset Type Size</div><div>cbfs master header 0x0 cbfs header 32</div><div>fallback/romstage 0x80 stage 28268</div><div>cpu_microcode_blob.bin 0x6f40 microcode 0</div><div>fallback/ramstage 0x6fc0 stage 65343</div><div>config 0x16f40 raw 291</div><div>revision 0x170c0 raw 569</div><div>fallback/postcar 0x17340 stage 16916</div><div>fallback/dsdt.aml 0x1b5c0 raw 99</div><div>fallback/payload 0x1b680 payload 361265</div><div>(empty) 0x73a00 null 443544</div><div>mrc.cache 0xdfec0 mrc_cache 65536</div><div>(empty) 0xeff00 null 32664</div><div>bootblock 0xf7ec0 bootblock 32768</div></div><div><br></div><div>This is an 8 MB image, I flashed it to SPI flash at address 0. When I boot the board no output is observed either on USB serial console or on HDMI display.</div><div><br></div><div>Do I need to add something more to see at least coreboot log. I am tryng to use GRUB2 as payload to coreboot.</div><div><br></div><div>Thanks</div><div><br></div></div>
</blockquote></div><br></div>