<div dir="ltr"><div><div>Hi all,<br></div>I am reading seaBios code, and I have a question about the shadow memory copy part. In fw/shadow.c:make_bios_writable_intel()
reads pam0 to see if shadow memory is already readable (if pam0's
fourth bit is set), if pam0 shows shadow memory is not readable running
__make_bios_writable_intel from high-memory flash location (statements
marked green below). <br> But in my understanding the entry point of
bios is 0xffff:fff0, then it jumps to 0xf000:e05b, which points to
memory space in shadowing, but before __make_bios_writable_intel copying
bios from high-memory flash to shadow memory, shadow memory is
disabled, so these codes are forwarded to high-memory flash, including
code to read pam0 before invoking __make_bios_writable_intel (statement
marked red below). Why these codes are not relocate to high-memory
flash, but only the invocation of __make_bios_writable_intel is need to
be relocated?<br>If shadow ram is present and readable, how cpu execute bios codes in 0xf000:xxxx before copying them to shadow ram?<br><br> 60 static void<br> 61 make_bios_writable_intel(u16 bdf, u32 pam0)<br> 62 {<br> 63 <span style="color:rgb(255,0,0)">int reg = pci_config_readb(bdf, pam0);</span><br> 64 <span style="color:rgb(0,255,0)">if (!(reg & 0x10)) {<br> 65 // QEMU doesn't fully implement the piix shadow capabilities -<br> 66 // if ram isn't backing the bios segment when shadowing is<br> 67 // disabled, the code itself won't be in memory. So, run the<br> 68 // code from the high-memory flash location.<br> 69 u32 pos = (u32)__make_bios_writable_intel + BIOS_SRC_OFFSET;<br> 70 void (*func)(u16 bdf, u32 pam0) = (void*)pos;<br> 71 func(bdf, pam0);<br> 72 return;<br> 73 }</span><br> 74 // Ram already present - just enable writes<br> 75 __make_bios_writable_intel(bdf, pam0);<br> 76 }<br><br></div>Thanks</div>