[SerialICE] New patch to review for serialice: 6204bc6 Add mainboard ASRock 775i65G

Idwer Vollering (vidwer@gmail.com) gerrit at coreboot.org
Tue Nov 13 22:32:27 CET 2012


Idwer Vollering (vidwer at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1830

-gerrit

commit 6204bc6bff8d55251003394a7c217540a76c2e6e
Author: Idwer Vollering <vidwer at gmail.com>
Date:   Tue Nov 13 22:30:36 2012 +0100

    Add mainboard ASRock 775i65G
    
    Add mainboard ASRock 775i65G
    
    Change-Id: Ia1177107c98fc75cc6c4bc89cdcc24ba8b1e2ae6
    Signed-off-by: Idwer Vollering <vidwer at gmail.com>
---
 SerialICE/Kconfig                    |  4 +++
 SerialICE/mainboard/asrock_775i65g.c | 57 ++++++++++++++++++++++++++++++++++++
 2 files changed, 61 insertions(+)

diff --git a/SerialICE/Kconfig b/SerialICE/Kconfig
index 7199453..72e3924 100644
--- a/SerialICE/Kconfig
+++ b/SerialICE/Kconfig
@@ -111,6 +111,9 @@ config BOARD_VIA_EPIA_M850
 config BOARD_INTEL_D845GBV2
 	bool "Intel D845GBV2"
 
+config BOARD_ASROCK_775I65G
+	bool "ASRock 775i65G"
+
 endchoice
 
 config BOARD_INIT
@@ -140,6 +143,7 @@ config BOARD_INIT
 	default "aopen_dxpl-plus.c" if BOARD_AOPEN_DXPL_PLUS
 	default "via_epia_m850.c" if BOARD_VIA_EPIA_M850
 	default "intel_d845gbv2.c" if BOARD_INTEL_D845GBV2
+	default "asrock_775i65g.c" if BOARD_ASROCK_775I65G
 
 config SOUTHBRIDGE_INIT
 	string
diff --git a/SerialICE/mainboard/asrock_775i65g.c b/SerialICE/mainboard/asrock_775i65g.c
new file mode 100644
index 0000000..4d1512f
--- /dev/null
+++ b/SerialICE/mainboard/asrock_775i65g.c
@@ -0,0 +1,57 @@
+/*
+ * SerialICE
+ *
+ * Copyright (C) 2012 Idwer Vollering <vidwer at gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+const char boardname[33]="ASRock 775i65G                  ";
+
+#define SUPERIO_CONFIG_PORT 0x2e
+
+/* Hardware specific functions */
+static void mainboard_set_ich5(void)
+{
+	/* COM_DEC */ /* COMA at 0x3f8, COMB at 0x3f8 */
+        pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0xe0), 0x0);
+	/* LPC_EN */ /* FDD_LPC_EN=1, KBC_LPC_EN=1, CNF1_LPC_EN=1 */
+        pci_write_config16(PCI_ADDR(0, 0x1f, 0, 0xe6), 0x1408);
+	/* FB_DEC_EN1 */ /* FN_F8_EN=1, decode two 512 kilobyte flash ranges */
+        pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0xe3), 0x80);
+	/* FB_DEC_EN2 */ /* don't decode two 1 megabyte ranges */
+        pci_write_config8(PCI_ADDR(0, 0x1f, 0, 0xf0), 0x0);
+	/* FUNC_DIS */ /* D31_F6_DISABLE=1 (AC97 modem) */
+        pci_write_config16(PCI_ADDR(0, 0x1f, 0, 0xf2), 0x0040);
+}
+
+/* Winbond W83627HG */
+static void superio_init(void)
+{
+        pnp_enter_ext_func_mode(SUPERIO_CONFIG_PORT);
+	/* Set the clock to 48MHz */
+        pnp_write_register(SUPERIO_CONFIG_PORT, 0x24, 0xc0);
+        pnp_set_logical_device(SUPERIO_CONFIG_PORT, 2);
+        pnp_set_enable(SUPERIO_CONFIG_PORT, 0);
+        pnp_set_iobase0(SUPERIO_CONFIG_PORT, 0x3f8);
+        pnp_set_irq0(SUPERIO_CONFIG_PORT, 4);
+        pnp_set_enable(SUPERIO_CONFIG_PORT, 1);
+        pnp_exit_ext_func_mode(SUPERIO_CONFIG_PORT);
+}
+
+static void chipset_init(void)
+{
+        mainboard_set_ich5();
+        superio_init();
+}



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