[SerialICE] Patch merged into serialice/master: fd9fe24 Unify output line format

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit fd9fe2426d71257f2e47c2642a038a668a4eacd4
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Mon Feb 25 19:33:44 2013 +0200

    Unify output line format
    
    Serialice log had obscure format with characters like "#!*" appearing
    at different positions, this patch makes the output lines more readable.
    
    First number pair is a running index that could be used to group and indent the lines
    to improve readability. Doesn't work flawlessly yet.
    
    Second string is combination of flags telling how action got processed:
    
       I Info         -- informational line only
       R Raw          -- raw IO/MEMORY/CPU operation
       H Hardware     -- action was sent to target
       Q Qemu         -- action was sent to qemu
       U Undefined    -- action hit the fallback filter
       D Dropped      -- filter prevented sending action to target or qemu
       F Faked        -- filter modified the action on-the-fly
    
    Third field is the instruction pointer [CS:EIP]. At the moment EIP is not reported
    accurately at all.
    
    Remaining of the line describes the action.
    
    A few examples:
    
    Memory access, Raw + Qemu. Following is read of vector stored in the BIOS image file.
    
       0000.0001    RQ..    [ffff000:fff0]   MEM,ROM_HI:  readb fffffff0 => ea
       0000.0002    RQ..    [ffff000:fff0]   MEM,ROM_HI:  readw fffffff1 => e05b
       0000.0003    RQ..    [ffff000:fff0]   MEM,ROM_HI:  readw fffffff3 => f000
    
    PCI config read, Hardware. This is composed from either IO accesses to 0xcf8-0xcff or
    memory access to a specific PCI-e MM config region. Thus it is not Raw but a composed
    action.
    
       0044.0046    .H..    [f000:f764]   PCI: 0:1e.0 [004] => 00
    
    CPUID,  Raw + Hard + Faked. CPUID was executed on the target, but the returned
    value was modified. In this case, it fakes CPU has a single core.
    
       000d.000e    RH.F    [f000:e814]   CPUID: eax: 00000001; ecx: 00000000 => 00000f4a.00010800.0000649d.bfebfbff
    
    RDMSR Raw + Hard and WRMSR Raw + Dropped. In this case, requst to do microcode update
    in target CPU is dropped as our serialice.rom image doesn't contain that binary.
    
       0019.001a    RH..    [f000:e869]   CPU MSR: [00000017] => 00120000.00000000
       001c.001d    R..D    [f000:e88e]   CPU MSR: [00000079] <= 00000000.fffdfc10
    
    Change-Id: I99308636c6a997ac82740c7d715617a1564aba81
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
    Reviewed-on: http://review.coreboot.org/2511
    Tested-by: build bot (Jenkins)
    Reviewed-by: Stefan Reinauer <stefan.reinauer at coreboot.org>

Build-Tested: build bot (Jenkins) at Mon Feb 25 20:41:01 2013, giving +1
Reviewed-By: Stefan Reinauer <stefan.reinauer at coreboot.org> at Mon Feb 25 21:23:47 2013, giving +2
See http://review.coreboot.org/2511 for details.

-gerrit