[SerialICE] Patch set updated for serialice: 4f5a345 VX900: Add hook for PCI MMIO accesses
Alexandru Gagniuc (mr.nuke.me@gmail.com)
gerrit at coreboot.org
Tue Jul 23 12:01:45 CEST 2013
Alexandru Gagniuc (mr.nuke.me at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3795
-gerrit
commit 4f5a345f6810f9c47bd020b6f4e0237e92622543
Author: Alexandru Gagniuc <mr.nuke.me at gmail.com>
Date: Mon Jul 22 02:27:53 2013 -0500
VX900: Add hook for PCI MMIO accesses
Add a hook that enables decoding of PCI MMIO base on the VIA VX900.
Change-Id: I5a66366fc4dbaf4e2f60f58febad90f7bb7cd2ff
Signed-off-by: Alexandru Gagniuc <mr.nuke.me at gmail.com>
---
SerialICE/simba/chipset/via_bars.lua | 31 +++++++++++++++++++++++++------
1 file changed, 25 insertions(+), 6 deletions(-)
diff --git a/SerialICE/simba/chipset/via_bars.lua b/SerialICE/simba/chipset/via_bars.lua
index 8bf58e7..bafc53b 100644
--- a/SerialICE/simba/chipset/via_bars.lua
+++ b/SerialICE/simba/chipset/via_bars.lua
@@ -1,11 +1,20 @@
-function sb_mmio_bar(f, action)
- -- This MMIO space is used for SPI and CEC control
- f.dev.mmio.name = "SB_MMIO"
- f.dev.mmio.val = bit32.lshift(bit32.band(action.data, 0xfff0), 8)
- f.dev.mmio.size = 0x10000
+dev_nb_traf_ctl = {
+ pci_dev = pci_bdf(0,0,5,0),
+ name = "trf",
+ bar = {},
+}
- generic_mmio_bar(f.dev.mmio)
+function vx900_pcie_bar(f, action)
+ local baseaddr = bit32.lshift(action.data, 28)
+ local size = 256*1024*1024
+
+ -- enable is 0:00.5 [060] .10
+ if baseaddr then
+ pcie_mm_enable(f.dev, f.reg, baseaddr, size)
+ else
+ pcie_mm_disable(f.dev, f.reg, baseaddr, size)
+ end
end
dev_sb = {
@@ -15,6 +24,16 @@ dev_sb = {
mmio = { f = nil },
}
+function sb_mmio_bar(f, action)
+ -- This MMIO space is used for SPI and CEC control
+ f.dev.mmio.name = "SB_MMIO"
+ f.dev.mmio.val = bit32.lshift(bit32.band(action.data, 0xfff0), 8)
+ f.dev.mmio.size = 0x10000
+
+ generic_mmio_bar(f.dev.mmio)
+end
+
function northbridge_vx900()
+ pci_cfg8_hook(dev_nb_traf_ctl, 0x61, "PCI", vx900_pcie_bar)
pci_cfg32_hook(dev_sb, 0xbc, "SB_MMIO", sb_mmio_bar)
end
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