[SerialICE] Patch set updated for serialice: e7871f9 Add support for ASRock E350M1
Paul Menzel (paulepanter@users.sourceforge.net)
gerrit at coreboot.org
Fri Feb 14 09:57:04 CET 2014
Paul Menzel (paulepanter at users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3510
-gerrit
commit e7871f9acca713dcc99f041aab112b17d34b7599
Author: Paul Menzel <paulepanter at users.sourceforge.net>
Date: Fri Jun 21 10:17:46 2013 +0200
Add support for ASRock E350M1
The ASRock E350M1 uses the southbridge AMD SB800 and the Super I/O
Nuvoton NCT5572D similar to the Winbond W83627HF so use that one as done
in coreboot too.
Change-Id: I0a1eea0cf01d36682b737e0161eb2dfbc05f8d21
Signed-off-by: Paul Menzel <paulepanter at users.sourceforge.net>
---
SerialICE/Kconfig | 7 +++++++
SerialICE/mainboard/asrock_e350m1.c | 28 ++++++++++++++++++++++++++++
SerialICE/southbridge/amd-sbxxx.c | 5 +++++
3 files changed, 40 insertions(+)
diff --git a/SerialICE/Kconfig b/SerialICE/Kconfig
index 00933b2..a8313fb 100644
--- a/SerialICE/Kconfig
+++ b/SerialICE/Kconfig
@@ -69,6 +69,10 @@ config BOARD_ASUS_M4A77TD_PRO
bool "ASUS M4A77TD-PRO"
select BUILD_XMMSTACK
+config BOARD_ASROCK_E350M1
+ bool "ASRock E350M1"
+ select BUILD_XMMSTACK
+
config BOARD_ASROCK_939A785GMH
bool "ASRock 939A785GMH"
select BUILD_XMMSTACK
@@ -163,14 +167,17 @@ config BOARD_INIT
default "intel_d845gbv2.c" if BOARD_INTEL_D845GBV2
default "asrock_775i65g.c" if BOARD_ASROCK_775I65G
default "commell_lv_672.c" if BOARD_COMMELL_LV_672
+ default "asrock_e350m1.c" if BOARD_ASROCK_E350M1
config SOUTHBRIDGE_INIT
string
default "southbridge/intel-ich7.c" if BOARD_KONTRON_986LCD_M
+ default "southbridge/amd-sbxxx.c" if BOARD_ASROCK_E350M1
default "southbridge/amd-sbxxx.c" if BOARD_ASUS_F2A85_M
config SUPERIO_INIT
string
+ default "superio/winbond-w83627thg.c" if BOARD_ASROCK_E350M1
default "superio/winbond-w83627thg.c" if BOARD_KONTRON_986LCD_M
choice
diff --git a/SerialICE/mainboard/asrock_e350m1.c b/SerialICE/mainboard/asrock_e350m1.c
new file mode 100644
index 0000000..07f82af
--- /dev/null
+++ b/SerialICE/mainboard/asrock_e350m1.c
@@ -0,0 +1,28 @@
+/*
+ * SerialICE
+ *
+ * Copyright (C) 2006 Uwe Hermann <uwe at hermann-uwe.de>
+ * Copyright (C) 2013 Paul Menzel <paulepanter at users.sourceforge.net>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+const char boardname[33]="ASRock E350M1 ";
+
+static void chipset_init(void)
+{
+ southbridge_init();
+ sbxxx_enable_48mhzout();
+ superio_init();
+}
diff --git a/SerialICE/southbridge/amd-sbxxx.c b/SerialICE/southbridge/amd-sbxxx.c
index d246a04..1899396 100644
--- a/SerialICE/southbridge/amd-sbxxx.c
+++ b/SerialICE/southbridge/amd-sbxxx.c
@@ -35,6 +35,11 @@ static void sbxxx_enable_48mhzout(void)
{
u32 reg32;
+ reg32 = SB_MMIO_MISC32(0x24);
+ reg32 &= 0xffc7ffff;
+ reg32 |= 0x00100000;
+ SB_MMIO_MISC32(0x24) = reg32;
+
// Program SB800 MiscClkCntrl register to configure clock output on the
// 14M_25M_48M_OSC ball usually used for the Super-I/O.
// Almost all SIOs need 48 MHz, only the SMSC SCH311x wants 14 MHz,
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