https://www.coreboot.org/api.php?action=feedcontributions&user=Corey&feedformat=atomcoreboot - User contributions [en]2024-03-19T11:52:18ZUser contributionsMediaWiki 1.40.0https://www.coreboot.org/index.php?title=Board:bcom/winnetp680&diff=12173Board:bcom/winnetp6802013-10-21T00:31:00Z<p>Corey: </p>
<hr />
<div>This page describes how to use coreboot on the BCOM WinNET P680 motherboard. This board is used in the HP/Neoware e140 (aka CA22) and Igel 4210LX Winestra thin clients.<br />
<br />
This page is a work in progress.<br />
<br />
== Status ==<br />
<br />
Works somewhat. See known problems below. Work is in progress to fix these issues.<br />
<br />
==Known problems==<br />
<br />
* L1/L2 cache are running extremely slow, 11-12MB/s per Memtest86+. As a result, loading kernel/initrd is very slow<br />
* irq_tables.c from the factory BIOS does not work. The epia-cn table has been substituted, but it has problems too (Ethernet doesn't work right: 50% packet loss.). A workaround is to use the kernel parameter "irqpoll"<br />
* Boot log shows INT15 handler isn't working<br />
* hda in Linux is hde in FILO<br />
<br />
{{Status|<br />
<br />
|CPU_status = OK<br />
|CPU_comments = <br />
|CPU_L1_status = OK<br />
|CPU_L1_comments = Always on<br />
|CPU_L2_status = OK<br />
|CPU_L2_comments = Always on<br />
|CPU_L3_status = N/A<br />
|CPU_multiple_status = N/A<br />
|CPU_multicore_status = N/A<br />
|CPU_virt_status = N/A<br />
<br />
|RAM_EDO_status = N/A<br />
|RAM_SDRAM_status = N/A<br />
|RAM_SODIMM_status = N/A<br />
|RAM_DDR_status = N/A<br />
|RAM_DDR2_status = OK<br />
|RAM_DDR2_comments = Board only has a single laptop-sized DDR2 slot which does not support many larger (1GB+) sticks in the factory BIOS. Some of this may be corrected by coreboot, but some is a chipset limitation. More should be known when coreboot is working again.<br />
|RAM_DDR3_status = N/A<br />
|RAM_dualchannel_status = N/A<br />
|RAM_ecc_status = Untested<br />
<br />
|IDE_status = Partial<br />
|IDE_comments = hda in Linux is hde in FILO. IDE device doesn't get reset properly on boot (sometimes shows up as a floating bus)<br />
|IDE_CF_status = N/A<br />
|IDE_25_status = N/A<br />
|CDROM_DVD_status = N/A<br />
|SATA_status = N/A<br />
|SCSI_status = N/A<br />
|USB_status = OK<br />
|Onboard_VGA_status = OK<br />
|Onboard_VGA_comments = Needs factory VGA bios and bochsbios.<br />
|Onboard_ethernet_status = Partial<br />
|Onboard_ethernet_comments = 50% packet loss. Probably due to a bad IRQ table. See above.<br />
|Onboard_audio_status = Untested<br />
|Onboard_modem_status = N/A<br />
|Onboard_firewire_status = N/A<br />
|Smartcard_status = N/A<br />
|Onboard_CF_status = Unknown<br />
|Onboard_CF_comments = Igel 4210LX has CF slot with jumpers to select Master/Slave on the same "chain" as the 44-pin IDE connector. Untested but should work. It should also be possible to solder a CF slot onto the Neoware board.<br />
|Onboard_PCMCIA_status = N/A<br />
<br />
|ISA_cards_status = N/A<br />
|AMR_cards_status = N/A<br />
|AGP_cards_status = N/A<br />
|PCI_cards_status = Untested<br />
|PCI_cards_comments = Needs rightward angle adapter to fit card into case<br />
|Mini_PCI_cards_status = N/A<br />
|PCIX_cards_status = N/A<br />
|PCIE_x1_status = N/A<br />
|PCIE_x2_status = N/A<br />
|PCIE_x4_status = N/A<br />
|PCIE_x8_status = N/A<br />
|PCIE_x16_status = N/A<br />
|PCIE_x32_status = N/A<br />
|HTX_status = N/A<br />
<br />
|Floppy_status = N/A<br />
|COM1_status = OK<br />
|COM2_status = OK<br />
|PP_status = Untested<br />
|PS2_keyboard_status = OK<br />
|PS2_mouse_status = OK<br />
|Game_port_status = N/A<br />
|IR_status = N/A<br />
|Speaker_status = OK<br />
|DiskOnChip_status = N/A<br />
<br />
|Sensors_status = OK<br />
|Watchdog_status = N/A<br />
|CAN_bus_status = N/A<br />
|CPUfreq_status = Unknown<br />
|Powersave_status = N/A<br />
|ACPI_status = Fail<br />
|ACPI_comments = <br />
|Reboot_status = Fail<br />
|Reboot_comments = system resets, but on reboot, FILO can't see the IDE device.<br />
|Poweroff_status = Fail<br />
|LEDs_status = N/A<br />
|LEDs_comments = <br />
|HPET_status = Untested<br />
|HPET_comments = <br />
|RNG_status = OK<br />
|WakeOnModem_status = Untested<br />
|WakeOnLAN_status = Untested<br />
|WakeOnKeyboard_status = Untested<br />
|WakeOnMouse_status = Untested<br />
|Flashrom_status = OK<br />
|Flashrom_comments = R1733 or higher<br />
<br />
}}<br />
<br />
<br />
{{PD-self}}</div>Coreyhttps://www.coreboot.org/index.php?title=Board:bcom/winnetp680&diff=12172Board:bcom/winnetp6802013-10-21T00:30:52Z<p>Corey: </p>
<hr />
<div>This page describes how to use coreboot on the BCOM WinNET P680 motherboard. This board is used in the HP/Neoware e140 (aka CA22) and Igel 4210LX Winestra thin clients.<br />
<br />
This page is a work in progress.<br />
<br />
== Status ==<br />
<br />
Works somewhat. See known problems below. Work is in progress to fix these issues.<br />
<br />
==Known problems==<br />
<br />
* L1/L2 cache are running extrememly slow, 11-12MB/s per Memtest86+. As a result, loading kernel/initrd is very slow<br />
* irq_tables.c from the factory BIOS does not work. The epia-cn table has been substituted, but it has problems too (Ethernet doesn't work right: 50% packet loss.). A workaround is to use the kernel parameter "irqpoll"<br />
* Boot log shows INT15 handler isn't working<br />
* hda in Linux is hde in FILO<br />
<br />
{{Status|<br />
<br />
|CPU_status = OK<br />
|CPU_comments = <br />
|CPU_L1_status = OK<br />
|CPU_L1_comments = Always on<br />
|CPU_L2_status = OK<br />
|CPU_L2_comments = Always on<br />
|CPU_L3_status = N/A<br />
|CPU_multiple_status = N/A<br />
|CPU_multicore_status = N/A<br />
|CPU_virt_status = N/A<br />
<br />
|RAM_EDO_status = N/A<br />
|RAM_SDRAM_status = N/A<br />
|RAM_SODIMM_status = N/A<br />
|RAM_DDR_status = N/A<br />
|RAM_DDR2_status = OK<br />
|RAM_DDR2_comments = Board only has a single laptop-sized DDR2 slot which does not support many larger (1GB+) sticks in the factory BIOS. Some of this may be corrected by coreboot, but some is a chipset limitation. More should be known when coreboot is working again.<br />
|RAM_DDR3_status = N/A<br />
|RAM_dualchannel_status = N/A<br />
|RAM_ecc_status = Untested<br />
<br />
|IDE_status = Partial<br />
|IDE_comments = hda in Linux is hde in FILO. IDE device doesn't get reset properly on boot (sometimes shows up as a floating bus)<br />
|IDE_CF_status = N/A<br />
|IDE_25_status = N/A<br />
|CDROM_DVD_status = N/A<br />
|SATA_status = N/A<br />
|SCSI_status = N/A<br />
|USB_status = OK<br />
|Onboard_VGA_status = OK<br />
|Onboard_VGA_comments = Needs factory VGA bios and bochsbios.<br />
|Onboard_ethernet_status = Partial<br />
|Onboard_ethernet_comments = 50% packet loss. Probably due to a bad IRQ table. See above.<br />
|Onboard_audio_status = Untested<br />
|Onboard_modem_status = N/A<br />
|Onboard_firewire_status = N/A<br />
|Smartcard_status = N/A<br />
|Onboard_CF_status = Unknown<br />
|Onboard_CF_comments = Igel 4210LX has CF slot with jumpers to select Master/Slave on the same "chain" as the 44-pin IDE connector. Untested but should work. It should also be possible to solder a CF slot onto the Neoware board.<br />
|Onboard_PCMCIA_status = N/A<br />
<br />
|ISA_cards_status = N/A<br />
|AMR_cards_status = N/A<br />
|AGP_cards_status = N/A<br />
|PCI_cards_status = Untested<br />
|PCI_cards_comments = Needs rightward angle adapter to fit card into case<br />
|Mini_PCI_cards_status = N/A<br />
|PCIX_cards_status = N/A<br />
|PCIE_x1_status = N/A<br />
|PCIE_x2_status = N/A<br />
|PCIE_x4_status = N/A<br />
|PCIE_x8_status = N/A<br />
|PCIE_x16_status = N/A<br />
|PCIE_x32_status = N/A<br />
|HTX_status = N/A<br />
<br />
|Floppy_status = N/A<br />
|COM1_status = OK<br />
|COM2_status = OK<br />
|PP_status = Untested<br />
|PS2_keyboard_status = OK<br />
|PS2_mouse_status = OK<br />
|Game_port_status = N/A<br />
|IR_status = N/A<br />
|Speaker_status = OK<br />
|DiskOnChip_status = N/A<br />
<br />
|Sensors_status = OK<br />
|Watchdog_status = N/A<br />
|CAN_bus_status = N/A<br />
|CPUfreq_status = Unknown<br />
|Powersave_status = N/A<br />
|ACPI_status = Fail<br />
|ACPI_comments = <br />
|Reboot_status = Fail<br />
|Reboot_comments = system resets, but on reboot, FILO can't see the IDE device.<br />
|Poweroff_status = Fail<br />
|LEDs_status = N/A<br />
|LEDs_comments = <br />
|HPET_status = Untested<br />
|HPET_comments = <br />
|RNG_status = OK<br />
|WakeOnModem_status = Untested<br />
|WakeOnLAN_status = Untested<br />
|WakeOnKeyboard_status = Untested<br />
|WakeOnMouse_status = Untested<br />
|Flashrom_status = OK<br />
|Flashrom_comments = R1733 or higher<br />
<br />
}}<br />
<br />
<br />
{{PD-self}}</div>Coreyhttps://www.coreboot.org/index.php?title=ACPI&diff=12162ACPI2013-10-07T08:49:37Z<p>Corey: /* DSDT debugging */ Fix quote</p>
<hr />
<div></div>Coreyhttps://www.coreboot.org/index.php?title=Board:bcom/winnetp680&diff=12155Board:bcom/winnetp6802013-09-10T21:39:18Z<p>Corey: </p>
<hr />
<div>This page describes how to use coreboot on the BCOM WinNET P680 motherboard. This board is used in the HP/Neoware e140 (aka CA22) and Igel 4210LX Winestra thin clients.<br />
<br />
This page is a work in progress.<br />
<br />
== Status ==<br />
<br />
'''As of today (9/10/2013), current code does not boot and serial output is garbled.''' Work is in progress to get this board fully working. Code from svn rev 3566 (git revision unknown) may work with the listed caveats, per previous comments on this page.<br />
<br />
==Known problems==<br />
<br />
* hda in Linux is hde in FILO<br />
* loading kernel/initrd is very slow<br />
* irq_tables.c from the factory BIOS does not work. The epia-cn table has been substituted, but it has problems too (Ethernet doesn't work right: 50% packet loss.). A workaround is to use the kernel parameter "irqpoll"<br />
<br />
{{Status|<br />
<br />
|CPU_status = OK<br />
|CPU_comments = <br />
|CPU_L1_status = OK<br />
|CPU_L1_comments = Always on<br />
|CPU_L2_status = OK<br />
|CPU_L2_comments = Always on<br />
|CPU_L3_status = N/A<br />
|CPU_multiple_status = N/A<br />
|CPU_multicore_status = N/A<br />
|CPU_virt_status = N/A<br />
<br />
|RAM_EDO_status = N/A<br />
|RAM_SDRAM_status = N/A<br />
|RAM_SODIMM_status = N/A<br />
|RAM_DDR_status = N/A<br />
|RAM_DDR2_status = OK<br />
|RAM_DDR2_comments = Board only has a single laptop-sized DDR2 slot which does not support many larger (1GB+) sticks in the factory BIOS. Some of this may be corrected by coreboot, but some is a chipset limitation. More should be known when coreboot is working again.<br />
|RAM_DDR3_status = N/A<br />
|RAM_dualchannel_status = N/A<br />
|RAM_ecc_status = Untested<br />
<br />
|IDE_status = Partial<br />
|IDE_comments = hda in Linux is hde in FILO. IDE device doesn't get reset properly on boot (sometimes shows up as a floating bus)<br />
|IDE_CF_status = N/A<br />
|IDE_25_status = N/A<br />
|CDROM_DVD_status = N/A<br />
|SATA_status = N/A<br />
|SCSI_status = N/A<br />
|USB_status = OK<br />
|Onboard_VGA_status = OK<br />
|Onboard_VGA_comments = Needs factory VGA bios and bochsbios.<br />
|Onboard_ethernet_status = Partial<br />
|Onboard_ethernet_comments = 50% packet loss. Probably due to a bad IRQ table. See above.<br />
|Onboard_audio_status = Untested<br />
|Onboard_modem_status = N/A<br />
|Onboard_firewire_status = N/A<br />
|Smartcard_status = N/A<br />
|Onboard_CF_status = Unknown<br />
|Onboard_CF_comments = Igel 4210LX has CF slot with jumpers to select Master/Slave on the same "chain" as the 44-pin IDE connector. Untested but should work. It should also be possible to solder a CF slot onto the Neoware board.<br />
|Onboard_PCMCIA_status = N/A<br />
<br />
|ISA_cards_status = N/A<br />
|AMR_cards_status = N/A<br />
|AGP_cards_status = N/A<br />
|PCI_cards_status = Untested<br />
|PCI_cards_comments = Needs rightward angle adapter to fit card into case<br />
|Mini_PCI_cards_status = N/A<br />
|PCIX_cards_status = N/A<br />
|PCIE_x1_status = N/A<br />
|PCIE_x2_status = N/A<br />
|PCIE_x4_status = N/A<br />
|PCIE_x8_status = N/A<br />
|PCIE_x16_status = N/A<br />
|PCIE_x32_status = N/A<br />
|HTX_status = N/A<br />
<br />
|Floppy_status = N/A<br />
|COM1_status = OK<br />
|COM2_status = OK<br />
|PP_status = Untested<br />
|PS2_keyboard_status = OK<br />
|PS2_mouse_status = OK<br />
|Game_port_status = N/A<br />
|IR_status = N/A<br />
|Speaker_status = OK<br />
|DiskOnChip_status = N/A<br />
<br />
|Sensors_status = OK<br />
|Watchdog_status = N/A<br />
|CAN_bus_status = N/A<br />
|CPUfreq_status = Unknown<br />
|Powersave_status = N/A<br />
|ACPI_status = Fail<br />
|ACPI_comments = <br />
|Reboot_status = Fail<br />
|Reboot_comments = system resets, but on reboot, FILO can't see the IDE device.<br />
|Poweroff_status = Fail<br />
|LEDs_status = N/A<br />
|LEDs_comments = <br />
|HPET_status = Untested<br />
|HPET_comments = <br />
|RNG_status = OK<br />
|WakeOnModem_status = Untested<br />
|WakeOnLAN_status = Untested<br />
|WakeOnKeyboard_status = Untested<br />
|WakeOnMouse_status = Untested<br />
|Flashrom_status = OK<br />
|Flashrom_comments = R1733 or higher<br />
<br />
}}<br />
<br />
<br />
{{PD-self}}</div>Coreyhttps://www.coreboot.org/index.php?title=Board:bcom/winnetp680&diff=12154Board:bcom/winnetp6802013-09-10T21:38:03Z<p>Corey: /* Known problems */ "N/A" some unavailable features, update to reflect current coreboot status.</p>
<hr />
<div>This page describes how to use coreboot on the BCOM WinNET P680 motherboard. This board is used in the HP/Neoware e140 (aka CA22) and Igel 4210LX thin clients.<br />
<br />
This page is a work in progress.<br />
<br />
== Status ==<br />
<br />
This board works with target/bcom/winnetp680, except that it needs rev 3566 of src/southbridge/via/vt8237r.<br />
<br />
==Known problems==<br />
* '''As of today (9/10/2013), current code does not boot and serial output is garbled.''' Work is in progress to get this board fully working. Code from svn rev 3566 (git revision unknown) may work with the listed caveats, per previous comments on this page.<br />
* hda in Linux is hde in FILO<br />
* loading kernel/initrd is very slow<br />
* irq_tables.c from the factory BIOS does not work. The epia-cn table has been substituted, but it has problems too (Ethernet doesn't work right: 50% packet loss.). A workaround is to use the kernel parameter "irqpoll"<br />
<br />
{{Status|<br />
<br />
|CPU_status = OK<br />
|CPU_comments = <br />
|CPU_L1_status = OK<br />
|CPU_L1_comments = Always on<br />
|CPU_L2_status = OK<br />
|CPU_L2_comments = Always on<br />
|CPU_L3_status = N/A<br />
|CPU_multiple_status = N/A<br />
|CPU_multicore_status = N/A<br />
|CPU_virt_status = N/A<br />
<br />
|RAM_EDO_status = N/A<br />
|RAM_SDRAM_status = N/A<br />
|RAM_SODIMM_status = N/A<br />
|RAM_DDR_status = N/A<br />
|RAM_DDR2_status = OK<br />
|RAM_DDR2_comments = Board only has a single laptop-sized DDR2 slot which does not support many larger (1GB+) sticks in the factory BIOS. Some of this may be corrected by coreboot, but some is a chipset limitation. More should be known when coreboot is working again.<br />
|RAM_DDR3_status = N/A<br />
|RAM_dualchannel_status = N/A<br />
|RAM_ecc_status = Untested<br />
<br />
|IDE_status = Partial<br />
|IDE_comments = hda in Linux is hde in FILO. IDE device doesn't get reset properly on boot (sometimes shows up as a floating bus)<br />
|IDE_CF_status = N/A<br />
|IDE_25_status = N/A<br />
|CDROM_DVD_status = N/A<br />
|SATA_status = N/A<br />
|SCSI_status = N/A<br />
|USB_status = OK<br />
|Onboard_VGA_status = OK<br />
|Onboard_VGA_comments = Needs factory VGA bios and bochsbios.<br />
|Onboard_ethernet_status = Partial<br />
|Onboard_ethernet_comments = 50% packet loss. Probably due to a bad IRQ table. See above.<br />
|Onboard_audio_status = Untested<br />
|Onboard_modem_status = N/A<br />
|Onboard_firewire_status = N/A<br />
|Smartcard_status = N/A<br />
|Onboard_CF_status = Unknown<br />
|Onboard_CF_comments = Igel 4210LX has CF slot with jumpers to select Master/Slave on the same "chain" as the 44-pin IDE connector. Untested but should work. It should also be possible to solder a CF slot onto the Neoware board.<br />
|Onboard_PCMCIA_status = N/A<br />
<br />
|ISA_cards_status = N/A<br />
|AMR_cards_status = N/A<br />
|AGP_cards_status = N/A<br />
|PCI_cards_status = Untested<br />
|PCI_cards_comments = Needs rightward angle adapter to fit card into case<br />
|Mini_PCI_cards_status = N/A<br />
|PCIX_cards_status = N/A<br />
|PCIE_x1_status = N/A<br />
|PCIE_x2_status = N/A<br />
|PCIE_x4_status = N/A<br />
|PCIE_x8_status = N/A<br />
|PCIE_x16_status = N/A<br />
|PCIE_x32_status = N/A<br />
|HTX_status = N/A<br />
<br />
|Floppy_status = N/A<br />
|COM1_status = OK<br />
|COM2_status = OK<br />
|PP_status = Untested<br />
|PS2_keyboard_status = OK<br />
|PS2_mouse_status = OK<br />
|Game_port_status = N/A<br />
|IR_status = N/A<br />
|Speaker_status = OK<br />
|DiskOnChip_status = N/A<br />
<br />
|Sensors_status = OK<br />
|Watchdog_status = N/A<br />
|CAN_bus_status = N/A<br />
|CPUfreq_status = Unknown<br />
|Powersave_status = N/A<br />
|ACPI_status = Fail<br />
|ACPI_comments = <br />
|Reboot_status = Fail<br />
|Reboot_comments = system resets, but on reboot, FILO can't see the IDE device.<br />
|Poweroff_status = Fail<br />
|LEDs_status = N/A<br />
|LEDs_comments = <br />
|HPET_status = Untested<br />
|HPET_comments = <br />
|RNG_status = OK<br />
|WakeOnModem_status = Untested<br />
|WakeOnLAN_status = Untested<br />
|WakeOnKeyboard_status = Untested<br />
|WakeOnMouse_status = Untested<br />
|Flashrom_status = OK<br />
|Flashrom_comments = R1733 or higher<br />
<br />
}}<br />
<br />
<br />
{{PD-self}}</div>Coreyhttps://www.coreboot.org/index.php?title=Board:bcom/winnetp680&diff=12153Board:bcom/winnetp6802013-09-10T21:13:13Z<p>Corey: </p>
<hr />
<div>This page describes how to use coreboot on the BCOM WinNET P680 motherboard. This board is used in the HP/Neoware e140 (aka CA22) and Igel 4210LX thin clients.<br />
<br />
This page is a work in progress.<br />
<br />
== Status ==<br />
<br />
This board works with target/bcom/winnetp680, except that it needs rev 3566 of src/southbridge/via/vt8237r.<br />
<br />
==Known problems==<br />
* hda in Linux is hde in FILO<br />
* loading kernel/initrd is very slow<br />
* irq_tables.c from the factory BIOS does not work. The epia-cn table has been substituted, but it has problems too (Ethernet doesn't work right: 50% packet loss.). A workaround is to use the kernel parameter "irqpoll"<br />
* Current code is broken (doesn't compile). Pull rev 3566 of src/southbridge/via/vt8237r<br />
<br />
{{Status|<br />
<br />
|CPU_status = OK<br />
|CPU_comments = <br />
|CPU_L1_status = OK<br />
|CPU_L1_comments = Always on<br />
|CPU_L2_status = OK<br />
|CPU_L2_comments = Always on<br />
|CPU_L3_status = N/A<br />
|CPU_multiple_status = N/A<br />
|CPU_multicore_status = N/A<br />
|CPU_virt_status = N/A<br />
<br />
|RAM_EDO_status = N/A<br />
|RAM_SDRAM_status = N/A<br />
|RAM_SODIMM_status = N/A<br />
|RAM_DDR_status = N/A<br />
|RAM_DDR2_status = OK<br />
|RAM_DDR3_status = N/A<br />
|RAM_dualchannel_status = N/A<br />
|RAM_ecc_status = Untested<br />
<br />
|IDE_status = Partial<br />
|IDE_comments = hda in Linux is hde in FILO. IDE device doesn't get reset properly on boot (sometimes shows up as a floating bus)<br />
|IDE_CF_status = N/A<br />
|IDE_25_status = N/A<br />
|CDROM_DVD_status = N/A<br />
|SATA_status = N/A<br />
|USB_status = OK<br />
|Onboard_VGA_status = OK<br />
|Onboard_VGA_comments = Needs factory VGA bios and bochsbios.<br />
|Onboard_ethernet_status = Partial<br />
|Onboard_ethernet_comments = 50% packet loss. Probably due to a bad IRQ table. See above.<br />
|Onboard_audio_status = Untested<br />
|Onboard_modem_status = N/A<br />
|Onboard_firewire_status = N/A<br />
|Smartcard_status = N/A<br />
|Onboard_CF_status = N/A<br />
|Onboard_PCMCIA_status = N/A<br />
<br />
|ISA_cards_status = N/A<br />
|AMR_cards_status = N/A<br />
|AGP_cards_status = N/A<br />
|PCI_cards_status = Untested<br />
|PCIE_x1_status = N/A<br />
|PCIE_x2_status = N/A<br />
|PCIE_x4_status = N/A<br />
|PCIE_x8_status = N/A<br />
|PCIE_x16_status = N/A<br />
|PCIE_x32_status = N/A<br />
|HTX_status = N/A<br />
<br />
|Floppy_status = N/A<br />
|COM1_status = OK<br />
|COM2_status = OK<br />
|PP_status = Untested<br />
|PS2_keyboard_status = OK<br />
|PS2_mouse_status = OK<br />
|Game_port_status = N/A<br />
|IR_status = N/A<br />
|Speaker_status = OK<br />
|DiskOnChip_status = N/A<br />
<br />
|Sensors_status = OK<br />
|Watchdog_status = N/A<br />
|CAN_bus_status = N/A<br />
|CPUfreq_status = Unknown<br />
|Powersave_status = N/A<br />
|ACPI_status = Fail<br />
|ACPI_comments = <br />
|Reboot_status = Fail<br />
|Reboot_comments = system resets, but on reboot, FILO can't see the IDE device.<br />
|Poweroff_status = Fail<br />
|LEDs_status = N/A<br />
|LEDs_comments = <br />
|HPET_status = Untested<br />
|HPET_comments = <br />
|RNG_status = OK<br />
|WakeOnModem_status = Untested<br />
|WakeOnLAN_status = Untested<br />
|WakeOnKeyboard_status = Untested<br />
|WakeOnMouse_status = Untested<br />
|Flashrom_status = OK<br />
|Flashrom_comments = R1733 or higher<br />
<br />
}}<br />
<br />
<br />
{{PD-self}}</div>Coreyhttps://www.coreboot.org/index.php?title=Board:bcom/winnetp680&diff=12152Board:bcom/winnetp6802013-09-09T02:45:42Z<p>Corey: </p>
<hr />
<div>This page describes how to use coreboot on the BCOM WinNET P680 motherboard. This board is used in the HP/Neoware e140 (aka CA22) and Igel 4210LX thin clients.<br />
<br />
This page is a work in progress.<br />
<br />
== Status ==<br />
<br />
This board works with target/bcom/winnetp680, except that it needs rev 3566 of src/southbridge/via/vt8237r.<br />
<br />
==Known problems==<br />
* hda in Linux is hde in FILO<br />
* loading kernel/initrd is very slow<br />
* irq_tables.c from the factory BIOS does not work. The epia-cn table has been substituted, but it has problems too (Ethernet doesn't work right: 50% packet loss.). A workaround is to use the kernel parameter "irqpoll"<br />
* Current code is broken (doesn't compile). Pull rev 3566 of src/southbridge/via/vt8237r<br />
<br />
{{Status|<br />
<br />
|CPU_status = OK<br />
|CPU_comments = <br />
|CPU_L1_status = OK<br />
|CPU_L1_comments = Always on<br />
|CPU_L2_status = OK<br />
|CPU_L2_comments = Always on<br />
|CPU_L3_status = N/A<br />
|CPU_multiple_status = N/A<br />
|CPU_multicore_status = N/A<br />
|CPU_virt_status = N/A<br />
<br />
|RAM_EDO_status = N/A<br />
|RAM_SDRAM_status = N/A<br />
|RAM_SODIMM_status = N/A<br />
|RAM_DDR_status = N/A<br />
|RAM_DDR2_status = OK<br />
|RAM_DDR3_status = N/A<br />
|RAM_dualchannel_status = N/A<br />
|RAM_ecc_status = Untested<br />
<br />
|IDE_status = Partial<br />
|IDE_comments = hda in Linux is hde in FILO. IDE device doesn't get reset properly on boot (sometimes shows up as a floating bus)<br />
|IDE_CF_status = N/A<br />
|IDE_25_status = N/A<br />
|CDROM_DVD_status = N/A<br />
|SATA_status = N/A<br />
|USB_status = OK<br />
|Onboard_VGA_status = OK<br />
|Onboard_VGA_comments = Needs factory VGA bios and bochsbios.<br />
|Onboard_ethernet_status = Partial<br />
|Onboard_ethernet_comments = 50% packet loss. Probably due to a bad IRQ table. See above.<br />
|Onboard_audio_status = Untested<br />
|Onboard_modem_status = N/A<br />
|Onboard_firewire_status = N/A<br />
|Smartcard_status = N/A<br />
|Onboard_CF_status = N/A<br />
|Onboard_PCMCIA_status = N/A<br />
<br />
|ISA_cards_status = N/A<br />
|AMR_cards_status = N/A<br />
|AGP_cards_status = N/A<br />
|PCI_cards_status = Untested<br />
|PCIE_x1_status = N/A<br />
|PCIE_x2_status = N/A<br />
|PCIE_x4_status = N/A<br />
|PCIE_x8_status = N/A<br />
|PCIE_x16_status = N/A<br />
|PCIE_x32_status = N/A<br />
|HTX_status = N/A<br />
<br />
|Floppy_status = N/A<br />
|COM1_status = OK<br />
|COM2_status = OK<br />
|PP_status = Untested<br />
|PS2_keyboard_status = OK<br />
|PS2_mouse_status = OK<br />
|Game_port_status = N/A<br />
|IR_status = N/A<br />
|Speaker_status = OK<br />
|DiskOnChip_status = N/A<br />
<br />
|Sensors_status = OK<br />
|Watchdog_status = N/A<br />
|CAN_bus_status = N/A<br />
|CPUfreq_status = Unknown<br />
|Powersave_status = N/A<br />
|ACPI_status = Fail<br />
|ACPI_comments = <br />
|Reboot_status = Fail<br />
|Reboot_comments = system resets, but on reboot, FILO can't see the IDE device.<br />
|Poweroff_status = Fail<br />
|LEDs_status = N/A<br />
|LEDs_comments = <br />
|HPET_status = Untested<br />
|HPET_comments = <br />
|RNG_status = OK<br />
|WakeOnModem_status = Untested<br />
|WakeOnLAN_status = Untested<br />
|WakeOnKeyboard_status = Untested<br />
|WakeOnMouse_status = Untested<br />
|Flashrom_status = Patch needed<br />
|Flashrom_comments = Patch for Flashrom r1732 here: http://www.flashrom.org/pipermail/flashrom/2013-September/011562.html<br />
<br />
}}<br />
<br />
<br />
{{PD-self}}</div>Coreyhttps://www.coreboot.org/index.php?title=Laptop&diff=9830Laptop2010-07-18T06:56:39Z<p>Corey: /* Laptop survey */</p>
<hr />
<div>== Recent progress of coreboot on laptops ==<br />
<br />
* coreboot supports the [http://en.getac.com/products/P470/P470_overview.html Getac P470] semi rugged notebook, based on Intel 82945GM/ICH7.<br />
* coreboot supports the [http://www.roda-computer.com/en/products/notebooks/rocky-iii-rk886ex.html Roda RK886EX (Rocky III+)] laptop, based on Intel 82945GM/ICH7.<br />
* VIA has recently released open documentation for the VX700 and VX800 chipsets at the [http://linux.via.com.tw/support/downloadFiles.action VIA Download Portal].<br />
<br />
== Embedded controllers ==<br />
<br />
The remaining issue with supporting netbooks may be open firmware support for the [[Embedded controller]] (EC).<br />
These ECs used to support keyboard scan, lid open/closed, battery charging, power management, etc.<br />
<br />
coreboot should work with the "stock" EC firmware. This may still be a challenge because "we don't know what we don't know". Behavior at runtime is fairly standardized, but we don't know what we need to do for initialization - do we need to set up registers, put in tables, kick things, or will it all Just Work (TM)?<br />
<br />
== HOWTO to find a way ==<br />
<br />
* find a model and manufacturer of your laptop<br />
* download a superiotool (latest svn) and build it<br />
* run as root 'superiotool -deV' and save output<br />
* download a ectool (latest svn) and build it<br />
* run as root 'ectool' and save output<br />
* try to find information - what EC or Super I/O chip is used in your laptop (may be some info in Service Manuals or Disassembly guides)<br />
* if you see that ectool return some fake staff - like only 'FF' or '00' - so you have custom EC configuration, it's a hard work for support<br />
* if you see that ectool return looks like 'right' output - you have a big chances for support<br />
* you need to find from thease outputs Super I/O / EC chip name, or if not see this - disassembly your laptop<br />
* try to find your Super I/O / EC chip datasheet <br />
<br />
== Laptop survey ==<br />
<br />
This page attempts to list chipsets, Super I/Os, flash chips, and especially [[embedded controller]]s used in various laptops.<br />
<br />
{| border="0" style="font-size: smaller"<br />
|- bgcolor="#6699dd"<br />
! align="left" | Vendor<br />
! align="left" | Model<br />
! align="left" | CPU<br />
! align="left" | Chipset NB<br />
! align="left" | Chipset SB<br />
! align="left" | Super&nbsp;I/O<br />
! align="left" | [[Embedded controller|EC]]<br />
! align="left" | Flash Chip<br />
! align="left" | Flash Size<br />
! align="left" | Flash S.<br />
! align="left" | Flash T.<br />
! align="left" | Owner<br />
<br />
|- bgcolor="#dddddd"<br />
| ASUS || S96F/Z96F || Intel&nbsp;Core&trade;2 Duo T7400 || Intel&nbsp;i945 || Intel ICH7 || ITE IT8510E || in Super I/O || ? || ? || ? || ? || [http://www.flashrom.org/pipermail/flashrom/2010-January/001986.html macavity]<br />
|- bgcolor="#eeeeee"<br />
| Acer || Aspire One ZG5 || Intel Atom N270 1.6GHz || Intel 82945GME || Intel NH82801GBM ICH7-M || Winbond WPCE775LA0DG || in Super I/O || Winbond 25x80AVSIG || 8Mb || no || SOIP/DIP || [[User:XVilka|XVilka]]<br />
|- bgcolor="#dddddd"<br />
| Acer || Aspire 3613LC || Intel Celeron M 370 1.5GHz L2: 1MB || Intel 82910GML || Intel FW82801FBM SL7W6 ICH6-M || ? || ? || PMC 0537 PM39LV040-70JCE || 1Mb || no || SOIP/DIP || [[User:XVilka|XVilka]]<br />
|- bgcolor="#eeeeee"<br />
| Dell || [[Dell Latitude CPi A366XT|Latitude CPi A366XT]] || PII, 360 MHz || Intel 440BX |||| SMSC&nbsp;FDC37N958FR || in Super I/O || AMD AM29F040B || 512KB || yes || PLCC || [[User:Uwe|UH]]<br />
|- bgcolor="#dddddd"<br />
| Dell || [[Dell Latitude C610|Latitude C610]] || PIII, 1.2 GHz || Intel i830 |||| SMSC&nbsp;LPC47N252 || in Super I/O || SST SST49LF004A || 512KB || no || PLCC || [mailto:coreboot@miradou.com CybFr]<br />
|- bgcolor="#eeeeee"<br />
| Dell || Dell Vostro V13 || Intel Celeron 743 1.2GHz, L2: 1MB (Ultra Low Voltage) || Mobile Intel GS45 Express GHMC ||Intel 82801IEM ICH9M-E|| none || ITE IT8502E || Winbond 25Q16BVSIG || 2Mb || no || SOIP/PDIP || [[User:XVilka|XVilka]]<br />
|- bgcolor="#dddddd"<br />
| Dell || XPS M1530 || Intel&nbsp;Core&trade;2 Duo T7700 || Intel PM965 || Intel ICH8 || none || Winbond WPC8763L || Winbond 25X16VSIG || 16Mb || ?? || SPI || Corey Osgood<br />
|- bgcolor="#eeeeee"<br />
| Fujitsu-S. || Lifebook S-4572 || PIII, 750 MHz || Intel 82440MX |||| SMSC FDC37N769 || ? || Fujitsu&nbsp;MBM29F400T<sup>1</sup> || ? || no || TSOP(?) || [[User:Uwe|UH]]<br />
|- bgcolor="#dddddd"<br />
| Fujitsu-S. || Lifebook S7110 || Intel&nbsp;Core&trade;2 Duo T7200 || Intel&nbsp;i945 || Intel ICH7 || SMSC&nbsp;LPC47N217 || Fujitsu MB90378 || Spansion S25FL008A<sup>2</sup> || 1024 kB || no || SO8 / SPI || twice11<br />
|- bgcolor="#eeeeee"<br />
| Gateway || [[Gateway W730-K8X | W730-K8X]] || Socket 754 |||| ?? || ?? || ?? || SST 39VF040 || ?? || yes || PLCC || [[User:Juri|Juri]]<br />
|- bgcolor="#dddddd"<br />
| Gateway || [[Gateway 6020GZ|6020GZ]] || Celeron M 1.4Ghz || Intel 855GME |||| ?? || ?? || ?? || ?? || no || ?? || [[User:Juri|Juri]]<br />
|- bgcolor="#eeeeee"<br />
| Gericom || Webboy 340S2 || PIII || SiS630 |||| NSC PC87393VJG || NSC PC87570 || Winbond&nbsp;29C020 || 256 kB || yes || PLCC || [http://thread.gmane.org/gmane.linux.bios/13081 NS]<br />
|- bgcolor="#dddddd"<br />
| Getac || P470 || Intel&reg;&nbsp;Core 2 Duo Mobile || Intel 945 || Intel ICH7 || ? || ? || ? || 8Mb || no || SPI / SOIC8 || [[User:Stepan|Stefan Reinauer]]<br />
|- bgcolor="#eeeeee"<br />
| Highscreen || XD 14-C1700 || Intel&nbsp;Celeron&nbsp;1.7&nbsp;GHz || SiS650 |||| NSC&nbsp;PC87391(?) || ? || EON EN29F040(A) || 512 kB || yes || PLCC || [[User:Uwe|UH]]<br />
|- bgcolor="#dddddd"<br />
| HP || Omnibook XE3(L) || PIII, 750 MHz || Intel&nbsp;82371MB ||Intel PIIX4M || SMSC&nbsp;FDC37N869 || NSC&nbsp;PC87570 || SST 28SF040A || 512 kB || no || PLCC || [[User:Uwe|UH]]<br />
|- bgcolor="#eeeeee"<br />
| IBM || Thinkpad T30 || Intel P4 Mobile, 1.8 GHz || Intel&nbsp;i845 || Intel ICH3-M || NSC&nbsp;PC87392 || Renesas H8S&nbsp;64F3169ATE10 || ST&nbsp;M50FW080N5 || 1024 kB || no || TSOP40 / FWH || edgecase<br />
|- bgcolor="#dddddd"<br />
| MSI || Wind U100 || Intel Atom N280 1.66Ghz || Intel 945GSE || Intel ICH7-M || ? || ENE KB3310 || SST MX25L8005 || 8 Mb|| no || TSOP40 / SPI || ?<br />
|- bgcolor="#eeeeee"<br />
| One || [http://www.a110wiki.de A110] || VIA&nbsp;C7-M&nbsp;ULV&nbsp;1.0&nbsp;GHz || VIA VX800 |||| none || ENE KB3310 || ? || ? || no || ? || [[User:Uwe|UH]]<br />
|- bgcolor="#dddddd"<br />
| Panasonic || Toughbook&nbsp;CF-25 || P166MMX || FW82439TX&nbsp;(430TX) || FW82371AB || NSC PC87336VJG || Renesas&nbsp;3886 || SST SST29EE020 || 256 kB || no || ? || [[User:Miernik|Miernik]]<br />
|- bgcolor="#eeeeee"<br />
| Roda || Rocky III+ RK886EX || Intel&reg;&nbsp;Core 2 Duo Mobile T5500 || Intel 945 || Intel ICH7 || SMSC&reg;&nbsp;LPC47N227 || Renesas&nbsp;M38859 || SST SST49LF080 || 8Mb || yes || PLCC || [[User:Stepan|Stefan Reinauer]]<br />
|- bgcolor="#dddddd"<br />
| Roda || Rocky II+ RT686 || Intel&nbsp;Pentium III || Intel 430BX || Intel FW82371EB || SMSC&reg;&nbsp;FDC37N769 || Renesas&nbsp;M38867M8A || SST SST29LE020 || 256KB || yes || PLCC/parallel || [[User:Uwe|UH]]<br />
|- bgcolor="#eeeeee"<br />
| Sony || Vaio&nbsp;Picturebook&nbsp;PCG-C1XD || P2 400 || 443ZX |||| ? || ? || ST M29W004BT || 512 kB || no || || [[User:Miernik|Miernik]]<br />
|- bgcolor="#dddddd"<br />
| Sony || Vaio&nbsp;Picturebook&nbsp;PCG-C1X || P266MMX || 430TX |||| ? || ? || ? || ? || ? || ? || [[User:Miernik|Miernik]]<br />
|- bgcolor="#eeeeee"<br />
| Toshiba || Libretto&nbsp;50M PA1243CM || P133 || custom FPGA |||| ? || ? || ? || ? || ? || ? || [[User:Miernik|Miernik]]<br />
|- bgcolor="#dddddd"<br />
| Toshiba || Satellite&nbsp;A80-117 || Intel&nbsp;Celeron || Intel&nbsp;915GM || Intel ICH6 || SMSC&nbsp;LPC47N217 || ENE KB910 || ? || 1024 kB || no || TSOP (?) || [[User:Uwe|UH]]<br />
<br />
|}<br />
<br />
<small><br />
<sup>1</sup> According to the vendor BIOS update tool.<br /><br />
<sup>2</sup> Nice thing: EC/Flash is not shared, so you can erase the whole flash during system operation (this was tested).<br /><br />
</small><br />
<br />
Further links:<br />
<br />
* [http://tuxmobil.org/mylaptops.html Tuxmobil Laptop Survey]<br />
* [http://mcelrath.org/laptops.html Laptops/Notebooks with Linux Preinstalled]<br />
* [http://www.fsf.org/campaigns/free-bios.html The Free Software Foundation's Campaign for Free BIOS]<br />
<br />
== Mailinglist discussion ==<br />
<br />
A few earlier coreboot discussions on laptops are linked here, you might get useful information out of them: <br />
<br />
* [http://www.coreboot.org/pipermail/linuxbios/2005-February/010985.html Any update on coreboot for laptops] <br />
* [http://comments.gmane.org/gmane.linux.bios/13081 Notebook 340s2 (sis630) 256k Flash] <br />
* [http://www.coreboot.org/pipermail/linuxbios/2005-February/010972.html yet another reason to use coreboot in laptops I guess] <br />
* [http://www.coreboot.org/pipermail/linuxbios/2005-April/011429.html coreboot laptop hunt wiki page] <br />
* [http://www.coreboot.org/pipermail/linuxbios/2005-March/011140.html HP Pavillion ZV5000 (Laptop)] <br />
* [http://www.coreboot.org/pipermail/linuxbios/2005-July/011942.html SA1100] <br />
* [http://www.coreboot.org/pipermail/linuxbios/2003-September/004954.html Laptop with Sis 650 chipset] <br />
* [http://www.coreboot.org/pipermail/linuxbios/2006-September/015551.html coreboot on Laptops]<br />
<br />
== Who really makes your laptop? ==<br />
<br />
There are several various brands of laptops, but there are only a few actual laptop makers.<br />
<br />
Name brand companies like Hewlet Packard, Compaq, IBM, Dell, Gateway, Sony, Micron, Toshiba and others; including Alienware and Voodoo do not make their own laptops. The exceptions are Asus and Apple, and even Apple doesn't make all of their laptops.<br />
<br />
Original Design Manufacturers (ODM) make the laptops for Original Equipment Manufacturers (OEM). They in turn, add their preloaded hard drives and sell them to consumers. This is why a laptop is a bit more complicated to support with coreboot. The OEM's may not even have all the specifications for the laptop since the ODM has done all the design and assembly.<br />
<br />
Some laptop ODMs are:<br />
<br />
* [http://www.quantatw.com Quanta] makes laptops for Sony, Dell, and IBM <br />
* [http://www.inventec.com/ Inventec] and [http://www.arima.com.tw/ Arima] make the Compaq line<br />
* [http://www.compal.com/ Compal] also makes IBM and Dell lines, as well as Hewlett Packard<br />
* [http://www.clevo.com.tw/ Clevo] makes the popular Alienware and Voodoo gaming laptops<br />
<br />
Further links:<br />
<br />
* [http://www.laptopworldwide.com/laptops.html Makers of Laptops]<br />
* [http://tuxmobil.org/laptop_oem.html Laptop and NoteBook Manufacturer - OEM/ODM Relation Matrix]<br />
* [http://tuxmobil.org/reseller.html Where to Buy a Preinstalled Linux Laptop, Notebook, Mobile Phone or PDA? - Vendor Overview]<br />
<br />
== Random product links ==<br />
<br />
VIA has a list of many netbooks at [http://via.com.tw/en/products/notebook/notebook.jsp VIA Partner Mobility Devices]. <br />
<br />
VIA also has information on other mobile platforms at [http://via.com.tw/en/products/notebook/index.jsp VIA Mobility Platform]. <br />
<br />
The [http://www.a110wiki.de Quanta IL1] vx800 based reference design covers similar models/clones such as: <br />
<br />
*[http://www.one.de/shop/one-notebooks-one-mini-notebooks-c-213_214.html One Mini A110/A115/A120/A140/A150/A470] <br />
*[http://preview.tinyurl.com/5zbzl6 Airis Kira 100/350/740] <br />
*[http://www.norhtec.com/products/gecko/index.html Norhtec Gecko] <br />
*[http://www.pioneercomputers.com.au/products/configure.asp?c1=3&c2=12&id=2458 Pioneer DreamBook Light IL1] <br />
*[http://www.ctlcorp.com/v4/p-697-ctl-il1a-89-netbook-with-windows-xp-home.aspx CTL IL1] More [http://www.a110wiki.de/wiki/CTL_IL1 CTL IL1 info] with tear-down pics. <br />
*[http://www.aci-asia.com/html/Ethos_7.html ACi Ethos 7] <br />
*[http://www.ilikeblue.net/products/umpc.htm BDSI Deep Blue H1]<br />
<br />
Other vx800 based netbooks: <br />
<br />
*[http://www.everex.com/products/cloudbook_max/cloudbook_max.htm Everex CloudBook MAX] <br />
*[http://www.fic.com.tw/product/ce2a1.aspx FIC CE2A1]<br />
<br />
There are still a few netbook designs currently on the market that use the VIA vx700 chipset:<br />
<br />
*[http://www.sylvaniacomputers.com/products.php?p=g Sylvania G] <br />
*[http://www.everex.com/products/cloudbook/cloudbook.htm Everex Cloudbook] <br />
*[http://www.fic.com.tw/product/ce260.aspx FIC CE260] <br />
*[http://www.fic.com.tw/product/ce268.aspx FIC CE268]<br />
<br />
There are also several AMD 690/600 laptops still available that may be candidates as well: <br />
<br />
*[http://reviews.cnet.com/laptops/acer-extensa-4420-5963/4505-3121_7-33361062.html Acer Extensa 4420] <br />
*[http://www.raondigital.com EVERUN NOTE]<br />
<br />
Intel Atom with i945 chipset netbooks: <br />
<br />
*[http://en.wikipedia.org/wiki/Aspire_One Acer Aspire One] <br />
*[http://en.wikipedia.org/wiki/MSI_Wind_PC MSI Wind] <br />
*[http://en.wikipedia.org/wiki/ASUS_Eee_PC ASUS eeePC]</div>Coreyhttps://www.coreboot.org/index.php?title=FAQ&diff=6383FAQ2008-05-02T20:31:44Z<p>Corey: </p>
<hr />
<div></div>Coreyhttps://www.coreboot.org/index.php?title=Download_coreboot&diff=5638Download coreboot2008-01-23T04:52:39Z<p>Corey: ViewVC defaults to the LinuxBIOS repo, which no longer exists. Point it to the right repo (and bug Stepan to fix)</p>
<hr />
<div>__NOTOC__<br />
'''Note: These snapshots are for people, who use Linux as operating system and are able to build software from the source code.''' <br />
<br />
There is no ''easy to install package'' for people who want to quickly try out a new BIOS on their computer, yet. For this purpose we will soon provide a disk image, which you can use with the [[QEMU]] emulator to test coreboot on your Linux, OS X and Windows computers (without having to do any hardware changes).<br />
<br />
== Snapshots ==<br />
<br />
There is an archive of snapshots available at [http://qa.coreboot.org/ qa.coreboot.org]. There is a .bz2 tar file that gets updated when the repository changes. Older snapshots are maintained as well. You can also [http://www.coreboot.org/viewvc/trunk/coreboot-v2.tar.gz?view=tar download the most current snapshot] directly.<br />
<br />
== Subversion checkout ==<br />
<br />
coreboot keeps its development tree in a [http://subversion.tigris.org/ Subversion] repository. <br />
<br />
=== Anonymous access ===<br />
<br />
You can check it out as follows:<br />
<br />
If you want the new and '''still in development coreboot v3''' (ca. 11 MB data as of 09/2007):<br />
<br />
$ svn co svn://coreboot.org/repository/coreboot-v3<br />
<br />
If you want the '''current stable version coreboot v2''' (ca. 58 MB data as of 09/2007):<br />
<br />
$ svn co svn://coreboot.org/repos/trunk/coreboot-v2<br />
<br />
If you want a '''specific revision''' (see the [[Confirmed working svn revisions]] page):<br />
<br />
$ svn co svn://coreboot.org/repos/trunk/coreboot-v2 -r 2100<br />
<br />
If you want the '''old, unmaintained and unsupported coreboot v1''' tree (ca. 47 MB data as of 09/2007):<br />
<br />
$ svn co svn://coreboot.org/repos/trunk/coreboot-v1<br />
<br />
If your company installed a '''firewall that blocks the svn port''' (3690) you can also '''check out using the webdav frontend''':<br />
<br />
$ svn co <nowiki>https://coreboot.org/svn/trunk/coreboot-v2</nowiki><br />
<br />
=== Developer access with write permission ===<br />
<br />
Access for developers with write permission, is very similar to anonymous access. Just add your Subversion username as follows when checking out the repository:<br />
<br />
$ svn co svn://<username>@coreboot.org/repos/trunk/coreboot-v2<br />
<br />
== Source code browsing ==<br />
<br />
You can also browse the coreboot Subversion repository online using the [http://coreboot.org/viewvc/?root=coreboot ViewVC interface] or the [http://tracker.coreboot.org/trac/coreboot/browser Trac interface].</div>Coreyhttps://www.coreboot.org/index.php?title=Developer_Manual&diff=5445Developer Manual2007-11-28T05:35:06Z<p>Corey: /* RAM init */</p>
<hr />
<div><div style="color: red">'''This is work in progress!'''</div><br />
<br />
== Introduction ==<br />
<br />
This manual is intended for aspiring LinuxBIOS developers to help them get up to speed with the code base and the tasks required to add support for new chipsets, devices, and mainboards. It currently covers LinuxBIOSv2, but will be extended to also cover the development version LinuxBIOSv3 later.<br />
<br />
== Hardware Overview ==<br />
<br />
== LinuxBIOS Overview ==<br />
<br />
== Serial output and the Super I/O ==<br />
<br />
The [[wikipedia:Super I/O|Super I/O]] is a chip found on most of today's mainboards which is &mdash; among other things &mdash; responsible for the serial ports of the mainboard (e.g. COM1, COM2). This chip is usually the first thing you'll want to support, as it's required to get serial debugging output from the mainboard (via a null-modem cable and the proper software, e.g. [[minicom]] or CuteCom).<br />
<br />
[[Image:Winbond w83977ef.jpg|thumb|right|<small>Winbond W83977EF Super&nbsp;I/O</small>]]<br />
[[Image:Ite it8705f.jpg|thumb|right|<small>ITE IT8705F Super&nbsp;I/O</small>]]<br />
<br />
The steps for adding support for a new Super I/O chip are:<br />
* Add a directory src/superio/''vendor''/''device'' (e.g. src/superio/winbond/w83627ehg).<br />
* In that directory, add a file ''device''_early_serial.c (e.g. w83627ehg_early_serial.c). This file will be responsible to setup a serial port on the mainboard so that you can get serial debugging output. This will work even ''before'' the RAM is initialized, thus is useful/required for debugging the RAM initialization process.<br />
* In this file you now declare a function ''device''_enable_serial() which enables the requested serial port. Example:<br />
static void w83627ehg_enable_serial(device_t dev, unsigned int iobase)<br />
{<br />
pnp_enter_ext_func_mode(dev);<br />
pnp_set_logical_device(dev);<br />
pnp_set_enable(dev, 0);<br />
pnp_set_iobase(dev, PNP_IDX_IO0, iobase);<br />
pnp_set_enable(dev, 1);<br />
pnp_exit_ext_func_mode(dev);<br />
}<br />
* Mainboards which have this Super I/O chip, will call this function in their ''auto.c'' or ''cache_as_ram_auto.c'' file. Example:<br />
#include "superio/winbond/w83627ehg/w83627ehg_early_serial.c"<br />
[...]<br />
#define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1)<br />
[...]<br />
w83627ehg_enable_dev(SERIAL_DEV, TTYS0_BASE);<br />
uart_init();<br />
console_init();<br />
:Whether the Super I/O is at config address ''0x2e'' (the usual case) or ''0x4e'' (or some other address) is mainboard-dependent. You can find out the address by running [[superiotool]].<br />
<br />
== Northbridge ==<br />
<br />
== RAM init ==<br />
<br />
Resources: <br><br />
SDRAM:<br />
<!--* [ JEDEC SDRAM Standard] TODO --><br />
* [http://www.intel.com/design/chipsets/memory/spdsd12a.pdf Intel SPD Standard]<br />
<!--* [ JEDEC SPD Standard] TODO --><br />
* [http://download.micron.com/pdf/datasheets/dram/sdram/512MbSDRAM.pdf Micron 512 MB SDRAM Datasheet] (PDF) -- contains some helpful explanations<br />
<br />
DDR SDRAM:<br />
<!--* [ JEDEC DDR Standard] (PDF) Explains the RAM initialization process TODO--><br />
* [http://www.jedec.org/download/search/4_01_02_04R13.PDF JEDEC DDR SPD Standard] (PDF)<br />
* [http://www.simmtester.com/page/news/showpubnews.asp?num=101 Understanding DDR Serial Presence Detect (SPD) Table]<br />
* [http://download.micron.com/pdf/datasheets/modules/ddr/DDA9C16_32_64x72AG.pdf Micron DDR400 Datasheet]<br />
<br />
DDR2 SDRAM<br />
* [http://www.jedec.org/download/search/JESD79-2C.pdf JEDEC DDR2 Standard] (PDF)<br />
* [http://www.jedec.org/download/search/4_01_02_04R13.PDF JEDEC DDR2 SPD Standard] (PDF)<br />
* [http://www.simmtester.com/PAGE/news/showpubnews.asp?where=373939&num=139 DDR2 DIMM SPD Definition]<br />
<!-- TODO: Add datasheet links (Micron ones are very good) --><br />
<br />
DDR3 SDRAM<br />
<!-- Need to find these<br />
* [ JEDEC DDR3 Standard] (PDF)<br />
* [ JEDEC DDR3 SPD Standard] (PDF)--><br />
* [http://www.simmtester.com/PAGE/news/showpubnews.asp?num=153 Understanding DDR3 Serial Presence Detect (SPD) Table]<br />
<br />
== Southbridge ==<br />
<br />
== Mainboard ==<br />
<br />
=== IRQ Table ===<br />
<br />
== Creating a new Target ==<br />
<br />
To create a new mainboard target you have to add several files.<br />
<br />
* Multiple files in src/mainboard/''vendorname''/''mainboardname'' (replace ''vendorname'' and ''mainboardname'', of course).<br />
* A file targets/''vendorname''/''mainboardname''/Config.lb which specifies a few target-specific config options, e.g. the ROM chip size, the payload, etc.<br />
<br />
== Miscellaneous Tips ==<br />
<br />
=== minicom ===<br />
Minicom is not just a serial terminal. It was written long before the internet existed and electronic communication was only possible with a modem to a mailbox-computer. Minicom is written with the ncurses library and provides its magic via a text interface. Other than logging, it provides z-modem up- and download-capability. <br />
<br />
=== CuteCom === <br />
This is an easy to use serial-terminal-program which is even able to write all communication into a log-file. It needs a computer with installed Qt-libs.[[Image:CuteCom.png|thumb|left]]<br />
<br />
{{GPL}}</div>Coreyhttps://www.coreboot.org/index.php?title=Developer_Manual&diff=5444Developer Manual2007-11-27T21:45:39Z<p>Corey: /* RAM init */</p>
<hr />
<div><div style="color: red">'''This is work in progress!'''</div><br />
<br />
== Introduction ==<br />
<br />
This manual is intended for aspiring LinuxBIOS developers to help them get up to speed with the code base and the tasks required to add support for new chipsets, devices, and mainboards. It currently covers LinuxBIOSv2, but will be extended to also cover the development version LinuxBIOSv3 later.<br />
<br />
== Hardware Overview ==<br />
<br />
== LinuxBIOS Overview ==<br />
<br />
== Serial output and the Super I/O ==<br />
<br />
The [[wikipedia:Super I/O|Super I/O]] is a chip found on most of today's mainboards which is &mdash; among other things &mdash; responsible for the serial ports of the mainboard (e.g. COM1, COM2). This chip is usually the first thing you'll want to support, as it's required to get serial debugging output from the mainboard (via a null-modem cable and the proper software, e.g. [[minicom]] or CuteCom).<br />
<br />
[[Image:Winbond w83977ef.jpg|thumb|right|<small>Winbond W83977EF Super&nbsp;I/O</small>]]<br />
[[Image:Ite it8705f.jpg|thumb|right|<small>ITE IT8705F Super&nbsp;I/O</small>]]<br />
<br />
The steps for adding support for a new Super I/O chip are:<br />
* Add a directory src/superio/''vendor''/''device'' (e.g. src/superio/winbond/w83627ehg).<br />
* In that directory, add a file ''device''_early_serial.c (e.g. w83627ehg_early_serial.c). This file will be responsible to setup a serial port on the mainboard so that you can get serial debugging output. This will work even ''before'' the RAM is initialized, thus is useful/required for debugging the RAM initialization process.<br />
* In this file you now declare a function ''device''_enable_serial() which enables the requested serial port. Example:<br />
static void w83627ehg_enable_serial(device_t dev, unsigned int iobase)<br />
{<br />
pnp_enter_ext_func_mode(dev);<br />
pnp_set_logical_device(dev);<br />
pnp_set_enable(dev, 0);<br />
pnp_set_iobase(dev, PNP_IDX_IO0, iobase);<br />
pnp_set_enable(dev, 1);<br />
pnp_exit_ext_func_mode(dev);<br />
}<br />
* Mainboards which have this Super I/O chip, will call this function in their ''auto.c'' or ''cache_as_ram_auto.c'' file. Example:<br />
#include "superio/winbond/w83627ehg/w83627ehg_early_serial.c"<br />
[...]<br />
#define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1)<br />
[...]<br />
w83627ehg_enable_dev(SERIAL_DEV, TTYS0_BASE);<br />
uart_init();<br />
console_init();<br />
:Whether the Super I/O is at config address ''0x2e'' (the usual case) or ''0x4e'' (or some other address) is mainboard-dependent. You can find out the address by running [[superiotool]].<br />
<br />
== Northbridge ==<br />
<br />
== RAM init ==<br />
<br />
Resources:<br />
SDRAM:<br />
<!--* [ JEDEC SDRAM Standard] TODO --><br />
* [http://www.intel.com/design/chipsets/memory/spdsd12a.pdf Intel SPD Standard]<br />
<!--* [ JEDEC SPD Standard] TODO --><br />
* [http://download.micron.com/pdf/datasheets/dram/sdram/512MbSDRAM.pdf Micron 512 MB SDRAM Datasheet] (PDF) -- contains some helpful explanations<br />
<br />
DDR SDRAM:<br />
<!--* [ JEDEC DDR Standard] (PDF) Explains the RAM initialization process TODO--><br />
* [http://www.jedec.org/download/search/4_01_02_04R13.PDF JEDEC DDR SPD Standard] (PDF)<br />
* [http://www.simmtester.com/page/news/showpubnews.asp?num=101 Understanding DDR Serial Presence Detect (SPD) Table]<br />
* [http://download.micron.com/pdf/datasheets/modules/ddr/DDA9C16_32_64x72AG.pdf Micron DDR400 Datasheet]<br />
<br />
DDR2 SDRAM<br />
* [http://www.jedec.org/download/search/JESD79-2C.pdf JEDEC DDR2 Standard] (PDF)<br />
* [http://www.jedec.org/download/search/4_01_02_04R13.PDF JEDEC DDR2 SPD Standard] (PDF)<br />
* [http://www.simmtester.com/PAGE/news/showpubnews.asp?where=373939&num=139 DDR2 DIMM SPD Definition]<br />
<!-- TODO: Add datasheet links (Micron ones are very good) --><br />
<br />
DDR3 SDRAM<br />
<!-- Need to find these<br />
* [ JEDEC DDR3 Standard] (PDF)<br />
* [ JEDEC DDR3 SPD Standard] (PDF)--><br />
* [http://www.simmtester.com/PAGE/news/showpubnews.asp?num=153 Understanding DDR3 Serial Presence Detect (SPD) Table]<br />
<br />
== Southbridge ==<br />
<br />
== Mainboard ==<br />
<br />
=== IRQ Table ===<br />
<br />
== Creating a new Target ==<br />
<br />
To create a new mainboard target you have to add several files.<br />
<br />
* Multiple files in src/mainboard/''vendorname''/''mainboardname'' (replace ''vendorname'' and ''mainboardname'', of course).<br />
* A file targets/''vendorname''/''mainboardname''/Config.lb which specifies a few target-specific config options, e.g. the ROM chip size, the payload, etc.<br />
<br />
== Miscellaneous Tips ==<br />
<br />
=== minicom ===<br />
Minicom is not just a serial terminal. It was written long before the internet existed and electronic communication was only possible with a modem to a mailbox-computer. Minicom is written with the ncurses library and provides its magic via a text interface. Other than logging, it provides z-modem up- and download-capability. <br />
<br />
=== CuteCom === <br />
This is an easy to use serial-terminal-program which is even able to write all communication into a log-file. It needs a computer with installed Qt-libs.[[Image:CuteCom.png|thumb|left]]<br />
<br />
{{GPL}}</div>Corey