https://www.coreboot.org/api.php?action=feedcontributions&user=Dgut&feedformat=atomcoreboot - User contributions [en]2024-03-29T15:42:50ZUser contributionsMediaWiki 1.40.0https://www.coreboot.org/index.php?title=Board:lenovo/x230&diff=34356Board:lenovo/x2302018-04-23T08:21:30Z<p>Dgut: Point about WoL feature, removed buspirate-specific instructions (which were elsewhere)</p>
<hr />
<div>== Status ==<br />
[[Intel_Native_Raminit]] has it's own status page.<br />
<br />
Thanks for your interest in Lenovo X230 port.<br />
<br />
Issues:<br />
* Badly seated RAM may prevent booting (not really a problem but coreboot is more suspicious to this than vendor BIOS)<br />
* Automatic screen rotation will not work on Windows 10 (X230T)<br />
* Buttons for screen rotation (X230T) and microphone mute don't work on Windows 10 (the first issue also causes the "Tablet Service" tsmservice.exe to hog one cpu core. It needs to be disabled.)<br />
* eGPU will not work on Windows 10 (ACPI BIOS ERROR bluescreen) - tested with a PE4C and NVidia GT730 attached via ExpressCard<br />
* UltraNav driver for the TrackPoint needs to be force-installed via device manager on Windows 10. It will only detect it as a PS/2 mouse otherwise.<br />
<br />
Tested:<br />
* S3 (Suspend to RAM)<br />
* RAM module combinations of 8G+8G, 8G+0, 0+8G, 4G+8G, 8G+4G, 8G+1G, 1G+0, 0+1G, 4G+0, 0+4G<br />
* USB (both 2.0 and 3.0 ports)<br />
* Video (both internal and VGA)<br />
* eGPU (works on Linux with 16GB of RAM - not on Windows, see above)<br />
* Expresscard slot (including hotplugging)<br />
* Sound (integrated speakers, integrated mic, external headphones, external mic)<br />
* LAN<br />
* mini-PCIe slots (both wlan and wwan)<br />
* Linux (through GRUB-as-payload)<br />
* Windows (through GRUB-as-payload loading SeaBIOS image from disk; you have to use extracted VGA blob, dumped from memory isn't good enough)<br />
* SD card slot<br />
* Thermal management<br />
* Fingerprint reader.<br />
* Webcam<br />
* trackpoint<br />
* touchpad<br />
* Fn hotkeys<br />
* Keyboard backlight<br />
* Thinklight.<br />
* bluetooth<br />
* dock (UltraBase Series 3 for X220 works, too)<br />
* msata (fixed in commit c8f54a1109072706e2fa091dc9ab4ad3eb057b42)<br />
* mini DisplayPort + fullsize DisplayPort (X230T)<br />
* digitizer + touchscreen on x230t variant<br />
<br />
== Proprietary components' status ==<br />
* CPU Microcode<br />
* VGA Option ROM (optional): you need it if you want graphics in several bootloaders, and proprietary OS<br />
* ME (Management Engine) => you do not have to touch it (just leave it where it is)<br />
* EC (Embedded Controller) => you do not have to touch it (just leave it where it is)<br />
<br />
== Code ==<br />
{{MergedIntoMaster}}<br />
<br />
== Building Firmware ==<br />
Please have a look at [[Intel_Sandybridge_Build_Tutorial]].<br />
<br />
It's actually sufficient to just flash the 4M chip (the one positioned at the top, marked spi1) with an image with ROM size of 12M, CBFS of 4M, and a fake IFD, for example with the SeaBIOS payload, or a small Linux payload with Busybox and kexec installed to load kernels. This is because the 4M chip holds the end of the concatenated 12M "opaque flash chip"'s 7M BIOS region, and is largely hardware specific (do *not* flash a Coreboot ROM with a fake IFD to a whole system on other systems!). This is sufficient to boot the system, and will allow one to flash the BIOS region internally later now that Coreboot is installed, taking advantage of the whole 7M (with default layout and not touching the other regions) BIOS region.<br />
<br />
== Flashing ==<br />
<br />
=== Hardware Flashing ===<br />
<br />
'''NOTICE:''' There has been at least one report of a bricked laptop due to just ''reading'' the flash chips' content with an external programmer. Apparently something on the board may break by applying external power.<br />
<br />
X230 has 2 flash chips of 8M and 4M. They're concatenated to one virtual flash chip of 12M (the 8M chip is the first portion of this virtual chip, and the 4M is the final portion) which is itself subdivided in roughly in 3 parts:<br />
<br />
* Descriptor (12K)<br />
* ME firmware (5M-12K)<br />
* System flash (7M)<br />
<br />
ME firmware is not readable.<br />
Vendor firmware locks the flash and so you need to flash externally.<br />
<br />
<gallery><br />
File:X230.jpg<br />
File:X230_chip.jpg<br />
File:X230_clip.jpg<br />
</gallery><br />
<br />
Proceeds as follows:<br />
* Turn off your laptop, remove battery and AC adapter.<br />
* Remove the keyboard.<br />
* Connect your external SPI flasher to the top SPI chip which is under palm resting space, on left side of the board. It's a 4M chip. IF you've chosen CBFS_SIZE 4M or smaller that' the only chip you need to reflash.<br />
<br />
Use of an SOIC-8 clip such as Pomona 5250 is recommended. You should ideally power flash using the wake-on-LAN (WoL) feature. If that doesn't work, be extremely careful not to supply more than 3.3V to flash (note that this is dangerous in this case). WoL provides the correct voltage and current in a stable manner, and does not power other parts of the board. Be careful not to connect VCC from your programmer or an external power supply while powering flash using the WoL feature.<br />
<br />
* Read the flash. Twice. Compare the files to be sure. Save a copy of it on<br />
external media.<br />
flashrom -p <yourprogrammer> -r flash.bin<br />
flashrom -p <yourprogrammer> -r flash2.bin<br />
diff flash.bin flash2.bin<br />
<br />
If they don't match, do not proceed. If the file is 8M, you're flashing wrong chip, connect to the right one.<br />
<br />
* Write the flash. Since you have to write only top 4M, first split out those 4M:<br />
dd of=top.rom bs=1M if=build/coreboot.rom skip=8<br />
<br />
* Use flashrom to flash top.rom.<br />
<br />
If you have trouble reading the chip successfully,<br />
the most common problems are<br />
*insufficient power supply <br />
*bad contacts<br />
*too long wires<br />
*bad pinout<br />
<br />
See also [http://flashrom.org/ISP In-System Programming]<br />
<br />
=== Internal Flashing ===<br />
<br />
You can flash internally with flashrom after IFD is unlocked and you have coreboot installed.<br />
<br />
To unlock IFD, use ``ifdtool`` to unlock the 8M part and reflash it:<br />
ifdtool -u ifdmegbe.rom<br />
<br />
The flashrom output is as follows:<br />
<br />
flashrom v0.9.9-rc1-r1942 on Linux 4.4.0-21-generic (x86_64)<br />
flashrom is free software, get the source code at https://flashrom.org<br />
<br />
Calibrating delay loop... OK.<br />
coreboot table found at 0xbff4d000.<br />
Found chipset "Intel QM77".<br />
Enabling flash write... Enabling hardware sequencing due to multiple flash chips detected.<br />
OK.<br />
Found Programmer flash chip "Opaque flash chip" (12288 kB, Programmer-specific) mapped at physical address 0x0000000000000000.<br />
<br />
You can flash both two chips. You can also flash just the top 4M with a layout file.<br />
<br />
x230-layout.txt:<br />
0x00000000:0x007fffff ifdmegbe<br />
0x00800000:0x00bfffff bios<br />
<br />
flashrom command:<br />
flashrom -p internal --layout x230-layout.txt --image bios --write build/coreboot.rom<br />
<br />
=== Error handling ===<br />
'''NOTICE:''' If it takes several minutes booting the laptop for the first time after flashing a new image, during which the screen remains black, then you have done something wrong. You likely corrupted the ME region or used an unnatural alignment of flash regions. When flashing coreboot you should never touch a flash region besides the one labeled "bios".<br />
<br />
== Setting battery threshold on a X230 with coreboot ==<br />
The [https://github.com/teleshoes/tpacpi-bat tpacpi-bat] utility doesn't work after flashing coreboot. An alternative is using the coreboot util [[ectool]].<br />
One can set the lower and upper charging threshold by writing the desired battery charge percentage (in hex) to addresses '''0xb0''' and '''0xb1''' respectively. So to start charging only when the battery is below 40% (0x28 in hex), one would execute:<br />
# ectool -w 0xb0 -z 0x28<br />
To stop charging an 70% (0x46 in hex):<br />
# ectool -w 0xb1 -z 0x46<br />
Hex values can be determined e.g. using '''printf''':<br />
$ printf '%x\n' 70<br />
46<br />
<br />
This can then be run as a script on startup to ensure permanence.</div>Dguthttps://www.coreboot.org/index.php?title=Board:asus/kgpe-d16&diff=32378Board:asus/kgpe-d162018-02-06T11:15:46Z<p>Dgut: Correct erroneous language describing TPM module compatibility</p>
<hr />
<div>[[File:Kgpe_d16_main_board_cropped_raptor_devsys.png|400px|thumb|right|ASUS KGPE-D16 on the development stand at Raptor Engineering.<p>To boot with a second CPU package installed, the 2nd EPS12V connector MUST be connected to a 8-pin power source that has sufficient amperage (Using a converter is risky).]]<br />
<br />
== General Information ==<br />
<br />
The KGPE-D16 is a AMD Family 10h / 15h, dual-CPU server and workstation motherboard released in 2009 (ASUS). It is well supported and stable under Coreboot, with all CPUs, RAM, and peripherals functioning normally. Family 10h (61xx) processors do not currently support the isochronous mode required to enable the IOMMU, but Family 15h (62xx, 63xx) processors work well with the IOMMU enabled. <br />
<br />
This board is automatically tested by Raptor Engineering's test stand. For more details please visit [[AutoTest/RaptorEngineering]].<br />
<br />
A basic system diagram is available in the official [https://www.coreboot.org/Board:asus/kgpe-d16#External_links manual, Appendix A.1] and has been confirmed to match the hardware shipping from ASUS. Not indicated are the PCIe lane widths for the gigabit network controller, which are both x1. All legacy PCI devices share the same bus, and partially due to this design the SP5100 has severe issues with bridging high-bandwidth PCI peripherals. As such, an external PCI-PCIe bridge is recommended should you need to interface a high bandwidth legacy PCI device to this system; ASMedia controllers have been verified to function correctly.<br />
<br />
Northbridge functions are distributed between the CPU internal northbridge and the SR5690 northbridge, which is effectively a HyperTransport to ALink/PCIe translator and switch. There is a separate SP5100 southbridge device, adjacent to the northbridge and residing under the smaller heatsink of the two. This device provides all traditional southbridge services including the LPC bridge and SATA controllers. All southbridge-destined messages, including CPU-originated power state control messages over HyperTransport, pass through the CPU northbridge and are routed to the southbridge via the SR5690 northbridge device. <br />
<br />
Incidentally, this design places the IOMMU, which is part of the SR5690, in the correct location to properly shield the main CPU from all unauthorized traffic. If the southbridge connected directly to a HyperTransport link there would be no way to prevent unauthorized DMA from legacy PCI devices connected to the southbridge, or even from the southbridge's embedded microprocessor.<br />
<br />
== Installation Notes ==<br />
* You MUST use at least one real 8PIN EPS12V cable for one CPU, and two real 8PIN EPS12V cables for two CPU's ('''Adapters may catch fire!''')<br />
* coreboot must be flashed externally when migrating from the proprietary BIOS. After coreboot has been flashed and booted at least once, flashrom can safely reprogram the ROM under Linux.<br />
* When migrating from the proprietary BIOS, after flashing coreboot the CMOS memory '''must''' be cleared. Failing to clear the CMOS will typically result in odd hangs during the boot process.<br />
* Enabling the serial console or EHCI debug console will drastically increase the time needed to boot.<br />
* Having a serial console log level above 2 will drastically increase the time required for booting.<br />
* The proprietary BMC module <b>must</b> be removed for coreboot to function - or flashed with the OpenBMC port<br />
* All CPU's are split in to two NUMA nodes as they are two 2/4/6/8 core CPU's in one package, memory is divided based on NUMA nodes (1 6282SE 16 core CPU, 2 Nodes, 32GB RAM, 16GB per node) and not properly aligning NUMA RAM will result in drastically decreased performance - make sure you do!<br />
* Turbo 2 and power saving seems to require a tickless system to function ('''nohz=on''' in the kernel cmdline), otherwise the extra cores are always woken up and will never enter CC6.<br />
* Check your used CPU for damage to the pins and bottom components, while a physically damaged CPU may still be sold as working it might not work in a dual socket configuration.<br />
<br />
=== Security Alert ===<br />
* The 63xx "Piledriver" series processors absolutely require microcode updates for safe operation due to the 2016 gain-root-via-NMI exploit that effects various versions of the burned in microcode updates - an update is also required to enable IOMMU due to an errata.<br />
<br />
=== Fan Control ===<br />
Coreboot does not do fan control so here are your options:<br />
<br />
OpenBMC is the best choice for this as you will have fancontrol no matter what the main operating system is doing<br />
* Install the OpenBMC port beta to the ASMB4-iKVM or ASMB5-iKVM modules that come with the main KGPE-D16 retail SKU, this provides fan control and a variety of other cool remote management features. The default configuration is 3 pin case fans and 4 pin PWM fans for the CPU fans as this is the only way to provide separate fan control zones due to ASUS not wiring up the rest of the SuperIO fan channels.<br />
<br />
* Fancontrol/pwmconfig to control your fans via linux.<br />
<br />
<br />
== Features ==<br />
<br />
{| class="wikitable" style="margin: auto;"<br />
|+Hardware Features - at a glance<br />
|-<br />
!scope="row"; | Format<br />
| SSI-EEB<br />
|-<br />
!scope="row"; | Socket<br />
| G34<br />
|-<br />
!scope="row"; | Max Processors<br />
| 2<br />
|-<br />
!scope="row"; | Max RAM <br />
| 192 GB || 128GB normal or 192GB via special configuration - See below<br />
|-<br />
!scope="row"; | PCI-e slots<br />
| 4 || 5 physical, 4 concurrent<br />
|-<br />
!scope="row"; | PCI slots<br />
| 1 || Via PCI Bridge that also connects onboard AST graphics chip<br />
|-<br />
!scope="row"; | Other Expansion Slots<br />
| 1 PIKE || ASUS Proprietary I/O Expansion Slot, Insert PIKE RAID card for second half of the motherboard SATA/SAS ports - half of the "PIKE" connector is simply a reversed PCI-e x4 slot.<br />
|-<br />
!scope="row"; | EEPROM Type<br />
|DIP 8 SPI Socket<br />
|-<br />
!scope="row"; | Factory EEPROM Size <br />
|2MB<br />
|-<br />
!scope="row"; | Max EEPROM Size <br />
|???<br />
|-<br />
!scope="row"; | TPM<br />
|YES || Compatibility with TPM modules that fit ASUS TPM header. (Connected over LPC.) Note these modules are proprietary.<br />
|-<br />
!scope="row"; | Crossfire XDMA<br />
| ??? || Has ACS and dual PCI-e 2.0 x16 slots, so it should work (reported working on vendor bios, need tester for coreboot)<br />
|}<br />
<br />
<br />
{| class="wikitable" style="margin: auto;"<br />
|+Binary Situation<br />
|-<br />
!scope="row"; | Blob Free Operations<br />
| YES<br />
|-<br />
!scope="row"; | Native GFX Init<br />
| Partial || Text Mode Only || Now features proper EDID parsing.<br />
|-<br />
!scope="row"; | BMC<br />
| || OpenBMC - open source remote management - Available for KGPE-D16 and KCMA-D8 boards via installation to the ASUS ASMB4-iKVM or ASMB5-iKVM module. <br />
|}<br />
<br />
<br />
{| class="wikitable" style="margin: auto;"<br />
|+Virtualization<br />
|-<br />
!scope="row"; | HVM <br />
| YES<br />
|-<br />
!scope="row"; | SLAT (RVI)<br />
| YES<br />
|-<br />
!scope="row"; | IOMMU<br />
| YES || v1.26 with Interrupt Remapping<br />
|-<br />
!scope="row"; | IOMMU for Graphics<br />
| YES || Near-Native 3D gaming graphics performance with proper software configuration<br />
|-<br />
!scope="row"; | PCI-e ACS <br />
| YES<br />
|-<br />
!scope="row"; | SR-IOV<br />
| ??? || Coreboot doesn't support SR-IOV<br />
|-<br />
!scope="row"; | PCI-e ARI<br />
| ???<br />
|| Required for more than 8 SR-IOV VF per device, AMD's docs say the chipset supports it however there are no firmware implementations that feature it. <br />
|}<br />
<br />
=== OpenBMC - Open Source Remote Management ===<br />
Raptor Engineering is working on porting OpenBMC to the KGPE-D16 and KCMA-D8 under a crowdfunded contract, it should be done in a few months and there is currently a beta available.<br />
<br />
https://www.raptorengineering.com/coreboot/kgpe-d16-bmc-port-status.php<br />
<br />
At the moment you require the ASUS ASMB4-iKVM or ASMB5-iKVM module to use it - most KGPE-D16 retail SKU's should come with this otherwise it is generally $30-60 used/new.<br />
<br />
== RAM HCL ==<br />
<br />
The following RAM models and configurations have been tested by either Raptor Engineering or a third party and are know to work as of the stated GIT revision. <br />
<!-- The bolded configuration [[AutoTest/RaptorEngineering|is automatically tested by Raptor Engineering]] on every coreboot GIT commit and for most relevant Gerrit changesets; please see the [https://review.coreboot.org/gitweb?p=board-status.git;a=summary board-status repository] for the latest tested GIT hash. --><br />
<br />
{| class="wikitable sortable"<br />
!Manufacturer<br />
!Model<br />
!Max working RAM / CPU<br />
!Size<br />
!Speed<br />
!Type<br />
!ECC<br />
!Populated Slots<br />
!CPU<br />
!Mainboard Type<br />
!Firmware<br />
|-<br />
|Micron<br />
|36KSF2G72PZ-1G4E1 [https://www.micron.com/parts/modules/ddr3-sdram/mt36kdzs2g72pz-1g4 (N/A)]<br />
|<br />
|16GB<br />
|DDR3-1333<br />
|Registered<br />
|Yes<br />
|A2 / C2<br />
|Opteron 6378<br />
|<br />
|Coreboot 2268e0d or later<br />
|-<br />
|Micron<br />
|MT36KSF1G72PZ-1G6M1FF<br />
|[[Board:asus/kgpe-d16/known_bad_configs|'''32GB''']]<br />
|8GB<br />
|DDR3-1600<br />
|Registered<br />
|Yes<br />
|All orange slots<br />
|Opteron 6262HE<br />
|1.03G<br />
|Internal development version of coreboot<br />
|-<br />
|Micron / HP<br />
|MT36JSF2G72PZ-1G6E1LG (HP: 672612-081)<br />
|[[Board:asus/kgpe-d16/known_bad_configs|'''32GB''']]<br />
|16GB<br />
|DDR3-1600<br />
|Registered<br />
|Yes<br />
|A2 / C2 / E2 / G2<br />
|Opteron 6276<br />
|1.03G<br />
|Libreboot 20160907<br />
|-<br />
|Hynix/Hyundai<br />
|HMT151R7BFR4C-H9<br />
|[[Board:asus/kgpe-d16/known_bad_configs|'''16GB''']]<br />
|4GB<br />
|DDR3-1333<br />
|Registered<br />
|Yes<br />
|A2 / C2 / E2 / G2<br />
A2 / B2 / C2 / D2<br />
|Opteron 6276<br />
|1.03G<br />
|Libreboot 20160907<br />
|-<br />
|Kingston<br />
|9965525-055.A00LF<br />
|<br />
|8GB<br />
|DDR3-1600<br />
|Unbuffered<br />
|Yes<br />
|A2 / C2 / E2 / F2<br />
|Opteron 6328<br />
|<br />
|Coreboot 9fba481<br />
|-<br />
|Kingston<br />
|[http://www.kingston.com/dataSheets/KVR16R11D4_16.pdf KVR16R11D4/16] (9965516-483.A00LF)<br />
|64GB<br />
|16GB<br />
|DDR3-1600<br />
|Registered<br />
|Yes<br />
|All orange slots (128GB)<br />
|Opteron 6278/6262HE<br />
|<br />
|Libreboot 20160907<br />
|-<br />
|Kingston<br />
|[http://www.kingston.com/dataSheets/KVR16R11D4K4_64I.pdf KVR16R11D4K4/64I] (9965516-477.A00LF)<br />
|64GB<br />
|16GB<br />
|DDR3-1600<br />
|Registered<br />
|Yes<br />
|All orange slots (128GB)<br />
|Opteron 6278/6262HE/6284SE<br />
|<br />
|Libreboot 20160907<br />
|-<br />
|crucial ("crucial by Micron")<br />
|[http://www.crucial.com/usa/en/ct16g3ersld4160b CT16G3ERSLD4160B] (MT36KSF2G72PZ-1G6P1NE)<br />
|64GB<br />
|16GB<br />
|DDR3-1600<br />
|Registered<br />
|Yes<br />
|All orange slots (128GB)<br />
|Opteron 6278/6282SE/6284SE/6287SE<br />
|1.03G, 1.04<br />
|Libreboot 20160907<br />
|-<br />
|Micron<br />
|[https://www.micron.com/parts/modules/ddr3-sdram/mt36ksf2g72pz-1g6 MT36KSF2G72PZ-1G6E1FE]<br />
|64GB<br />
|16GB<br />
|DDR3-1600<br />
|Registered<br />
|Yes<br />
|All orange slots<br />
|Opteron 6378<br />
|1.04<br />
|Internal development version of coreboot (2017)<br />
|-<br />
|Micron<br />
|[https://www.micron.com/parts/modules/ddr3-sdram/mt36ksf2g72pz-1g6 MT36KSF2G72PZ-1G6N1KG]<br />
|64GB<br />
|16GB<br />
|DDR3-1600<br />
|Registered<br />
|Yes<br />
|All orange slots<br />
|Opteron 6378<br />
|1.04<br />
|Internal development version of coreboot (2017)<br />
|-<br />
|crucial ("crucial by Micron")<br />
|[http://www.crucial.com/usa/en/ct16g3ersld4160b CT16G3ERSLD4160B] (MT36KSF2G72PZ-1G6P1NE)<br />
|192GB<br />
|16GB<br />
|DDR3-1600<br />
|Registered<br />
|Yes<br />
|Leave H1, H2, G1, G2 empty (see page 2-16 in the [https://www.coreboot.org/Board:asus/kgpe-d16#External_links ASUS manual]), LVDDR3_SEL1 can be set to "Force 1.35V"<br />
|Opteron 6278/6282SE/6284SE/6287SE<br />
|1.03G, 1.04<br />
|coreboot d6735b0<br />
|}<br />
<br />
== Processor Summary ==<br />
<br />
In addition to the 1 or 2 main CPUs, there are no less than three known secondary processors present on the mainboard. All are disabled when running under coreboot.<br />
* There is a very poorly documented microprocessor inside the SR5690; purpose and type unknown. It is believed this processor requires a firmware upload from the main platform firmware or via JTAG in order to start execution.<br />
* A single 8051 processor core is present inside the SB700 southbridge. It normally handles errata related to power states and may also be responsible for the blinking power LED in S3 suspend under the proprietary BIOS. It is believed accesses made by this processor are responsible for the flashrom write failure when the board is booted from the proprietary BIOS. This processor also requires a firmware upload from the main platform firmware or via JTAG in order to start execution.<br />
* The BMC has an integrated ARM core. This is disabled by pin strap when the BMC firmware module is not installed.<br />
<br />
Some processors may be present on or activated by add-on modules:<br />
* The optional PIKE add-on cards use ARM cores to handle the SAS protocol, though this firmware is directly loaded from a Flash chip on the module and does not involve any non-local components (e.g. the main CPU never touches the firmware on these modules outside of a manual reflash operation). Raptor Engineering is currently unaware of any SAS controllers that operate without a secondary processor or use libre firmware; the protocol is simply too complex to handle via a mask ROM, and as there are only one or two suppliers of SAS controllers there is very little incentive to release the source code to the firmware. Writing a libre firmware to replace the existing firmware may technically be possible, however it is extremely unlikely this will ever happen due to the man-decades required.<br />
* Installing an ASUS iKVM firmware module will activate the ARM core in the BMC, which has full system access to all peripherals and possibly memory. It is not recommended to use this module as the firmware is both highly privileged and proprietary, and is known to contain [http://jaroker.com/technotes/serverhard/asus-asmb5-ikvm-exploit-using-undocumented-hidden-root-shell-accounts/ at least one critical security bug].<br />
<br />
== Known Issues ==<br />
=== EHCI debug console === <br />
The EHCI debug console causes severe USB problems under both Libreboot and coreboot. This typically manifests as very slow boot / slow typing on USB keyboards. This issue appears to extend to the KCMA-D8 and [[Board:asus/kfsn4-dre|KFSN4-DRE]] boards as well.<br />
<br />
=== MMIO Resources Limit ===<br />
The coreboot 32bit MMIO space limits the use of large amounts of PCI-e devices, such as more than a few network interfaces or graphics cards with the limit coming up sooner for older multi-port NIC's that have a switched design (ex: 82576), vs the newer style native multi-port pci-e setup (i350)<br />
<br />
This is the reason for the "Not enough MMIO resources for SR-IOV" error when you attempt to enable SR-IOV on a system with both a quad port NIC and the onboard interfaces.<br />
<br />
=== RAM ===<br />
* Certain models and populations of DIMMs do not function under either coreboot or the proprietary BIOS. These failures may also be contingent on the exact PCB revision and / or CPU model installed. For a list of known failing combinations please visit [[Board:asus/kgpe-d16/known_bad_configs|KGPE-D16 Known Bad Configurations]].<br />
<br />
==== > 192 GB of RAM not working ====<br />
The KGPE-D16 doesn't work with more than 192 GB RAM (reported by [[User:ThomasUmbach|ThomasUmbach]]) and would need further work by coreboot developers.<br />
To use 192 GB RAM it's necessary to leave either the two DIMM slots next to the CPUs unpopulated (in this case, RAM training works well, but the system will be unstable) or the 4 closest on CPU1 (system stable), for more info see RAM HCL on this page (reported by [[User:ThomasUmbach|ThomasUmbach]]).<br />
<br />
=== Miscellaneous Notes ===<br />
The 4 total PCI-e slots may be limiting, but as the board has PCI-e ACS you may be able to use an external ACS supporting PCI-e expansion system - you would still have IOMMU security and performance as ACS support means that the devices beyond the external switch will be placed in separate IOMMU groups and thus you will maintain security and not have to use the unsafe attachment override for attaching devices to virtual machines.<br />
<br />
NOTE: MMIO space limit dependent.<br />
<br />
== MCM/NUMA notes - Read if you play video games ==<br />
<br />
NOTE: All G34 CPU's are dual-MCM thus with two NUMA nodes, if you play video games or need a single task with many threads the socket C32 single MCM/NUMA node KCMA-D8 is recommended.<br />
<br />
== Free Software Foundations "Respects Your Privacy" (RYF) certification ==<br />
The [https://store.vikings.net/libre-friendly-hardware/d16-ryf-certfied Vikings D16] (a relabelled KGPE-D16) board is being sold with coreboot/Libreboot pre-installed. It is the first workstation/server mainboard that has been "RYF - Respects Your Freedom" certified by the [https://www.fsf.org/resources/hw/endorsement/respects-your-freedom Free Software Foundation] on March 6th, 2017.<br />
<br />
== FAQ ==<br />
<br />
=== CPUs recommended by users ===<br />
Taiidan recommends the 63xx series due to improved performance, while the libreboot website says that they should be avoided as they need microcode updates due to the spectre exploit all opteron CPU's will require microcode updates anyway.<br />
<br />
{| class="wikitable" style="margin: auto;"<br />
!Processor [http://shop.amd.com sold by AMD]<br />
!Part Number<br />
!Cores<br />
!Requires microcode updates for secure operation ([https://libreboot.org/docs/hcl/kgpe-d16.html ref])<br />
!Notes <br />
|-<br />
!scope="row"; | Opteron 6386SE<br />
| OS6386YETGGHK<br />
| 16<br />
| {{No|Yes}}<br />
| <br />
|-<br />
!scope="row"; | Opteron 6328 <br />
| OS6328WKT8GHK or OS6328WKT8GHKWOF<br />
| 8<br />
| {{No|Yes}}<br />
| <br />
|-<br />
!scope="row"; | Opteron 6287SE<br />
| {{?}}<br />
| 16<br />
| {{Yes|No}}<br />
| <br />
|-<br />
!scope="row"; | Opteron 6284SE<br />
| ecx-Off-US-917385<br />
| 16<br />
| {{Yes|No}}<br />
| <br />
|-<br />
!scope="row"; | Opteron 6282SE<br />
| OS6282YETGGGU<br />
| 16<br />
| {{Yes|No}}<br />
| <br />
|-<br />
|}<br />
<br />
An 8 Core CPU is not really worth it unless you need the better single threaded performance more than the second set of cores.<br />
<br />
https://en.wikipedia.org/wiki/List_of_AMD_Opteron_microprocessors<br />
<br />
[[Category:Tutorials]]<br />
<br />
== External links ==<br />
* [https://www.asus.com/us/Commercial-Servers-Workstations/KGPED16/ Official product page]<br />
* [https://www.asus.com/us/Commercial-Servers-Workstations/KGPED16/HelpDesk_Manual/ Official manual]<br />
* [https://vikings.net/downloads/KGPE-D16_manual.pdf Official manual (mirror)]</div>Dguthttps://www.coreboot.org/index.php?title=Board:lenovo/x230&diff=29908Board:lenovo/x2302017-11-05T01:12:10Z<p>Dgut: /* Building Firmware */</p>
<hr />
<div>== Status ==<br />
[[Intel_Native_Raminit]] has it's own status page.<br />
<br />
Thanks for your interest in Lenovo X230 port.<br />
Issues:<br />
* Badly seated RAM may prevent booting (not really a problem but coreboot is more suspicious to this than vendor BIOS)<br />
<br />
Tested:<br />
* S3 (Suspend to RAM)<br />
* RAM module combinations of 8G+8G, 8G+0, 0+8G, 4G+8G, 8G+4G, 8G+1G, 1G+0, 0+1G, 4G+0, 0+4G<br />
* USB (both 2.0 and 3.0 ports)<br />
* Video (both internal and VGA)<br />
* Expresscard slot (including hotplugging)<br />
* Sound (integrated speakers, integrated mic, external headphones, external mic)<br />
* LAN<br />
* mini-PCIe slots (both wlan and wwan)<br />
* Linux (through GRUB-as-payload)<br />
* Windows (through GRUB-as-payload loading SeaBIOS image from disk; you have to use extracted VGA blob, dumped from memory isn't good enough)<br />
* SD card slot<br />
* Thermal management<br />
* Fingerprint reader.<br />
* Webcam<br />
* trackpoint<br />
* touchpad<br />
* Fn hotkeys<br />
* Keyboard backlight<br />
* Thinklight.<br />
* bluetooth<br />
* dock<br />
* msata (fixed in commit c8f54a1109072706e2fa091dc9ab4ad3eb057b42)<br />
* mini displayport<br />
* digitizer on x230t variant<br />
<br />
== proprietary components status ==<br />
* CPU Microcode<br />
* VGA Option ROM (optional): you need it if you want graphics in SeaBIOS but most payloads should work without it (text mode or corebootfb mode)<br />
* ME (Management Engine) => you do not have to touch it (just leave it where it is)<br />
* EC (Embedded Controller) => you do not have to touch it (just leave it where it is)<br />
<br />
== Code ==<br />
{{MergedIntoMaster}}<br />
<br />
== Building Firmware ==<br />
Please have a look at [[Intel_Sandybridge_Build_Tutorial]].<br />
<br />
It's actually sufficient to just flash the 4M chip (the one positioned at the top, marked spi1) with an image with ROM size of 12M, CBFS of 4M, and a fake IFD, for example with the SeaBIOS payload, or a small Linux payload with Busybox and kexec installed to load kernels. This is because the 4M chip holds the end of the concatenated 12M "opaque flash chip"'s 7M BIOS region, and is largely hardware specific (do *not* flash a Coreboot ROM with a fake IFD to a whole system on other systems!). This is sufficient to boot the system, and will allow one to flash the BIOS region internally later now that Coreboot is installed, taking advantage of the whole 7M (with default layout and not touching the other regions) BIOS region.<br />
<br />
== Flashing ==<br />
<br />
=== Hardware Flashring ===<br />
<br />
'''NOTICE:''' There has been at least one report of a bricked laptop due to just ''reading'' the flash chips' content with an external programmer. Apparently something on the board may break by applying external power.<br />
<br />
X230 has 2 flash chips of 8M and 4M. They're concatenated to one virtual flash chip of 12M which is itself subdivided in roughly in 3 parts:<br />
<br />
* Descriptor (12K)<br />
* ME firmware (5M-12K)<br />
* System flash (7M)<br />
<br />
ME firmware is not readable.<br />
Vendor firmware locks the flash and so you need to flash externally (unless until someone figures out a way around it).<br />
<br />
<gallery><br />
File:X230.jpg<br />
File:X230_chip.jpg<br />
File:X230_clip.jpg<br />
</gallery><br />
<br />
Proceeds as follows:<br />
* Turn off your laptop, remove battery and AC adapter.<br />
* Remove the keyboard.<br />
* Connect your external SPI flasher to the top SPI chip which is under palm resting space, on left side of the board. It's a 4M chip. IF you've chosen CBFS_SIZE 4M or smaller that' the only chip you need to reflash.<br />
<br />
I recommend using SOIC clip. Depending on the flasher you use, you may have to use separate<br />
3.3V source. Make sure not to feed more than 3.3V ot the chip. I used<br />
buspirate as flasher and 3.3V power lines from another computer.<br />
<br />
* Read the flash. Twice. Compare the files to be sure. Save a copy of it on<br />
external media.<br />
flashrom -p <yourprogrammer> -r flash.bin<br />
flashrom -p <yourprogrammer> -r flash2.bin<br />
diff flash.bin flash2.bin<br />
<br />
If they don't match, do not proceed. If the file is 8M, you're flashing wrong chip, connect to the right one.<br />
<br />
* Write the flash. Since you have to write only top 4M, first split out those 4M:<br />
dd of=top.rom bs=1M if=build/coreboot.rom skip=8<br />
<br />
* Use flashrom to flash top.rom.<br />
<br />
If you have trouble reading the chip successfully,<br />
the most common problems are<br />
*insufficient power supply <br />
*bad contacts<br />
*too long wires<br />
*bad pinout<br />
The cable shipped with buspirate was too long, and needed to be trimmed.<br />
<br />
See also [http://flashrom.org/ISP In-System Programming]<br />
<br />
=== Internal Flashing ===<br />
<br />
You can flash internally with flashrom after IFD is unlocked and you have coreboot installed.<br />
<br />
To unlock IFD, use ``ifdtool`` to unlock the 8M part and reflash it:<br />
ifdtool -u ifdmegbe.rom<br />
<br />
The flashrom output is as follows:<br />
<br />
flashrom v0.9.9-rc1-r1942 on Linux 4.4.0-21-generic (x86_64)<br />
flashrom is free software, get the source code at https://flashrom.org<br />
<br />
Calibrating delay loop... OK.<br />
coreboot table found at 0xbff4d000.<br />
Found chipset "Intel QM77".<br />
Enabling flash write... Enabling hardware sequencing due to multiple flash chips detected.<br />
OK.<br />
Found Programmer flash chip "Opaque flash chip" (12288 kB, Programmer-specific) mapped at physical address 0x0000000000000000.<br />
<br />
You can flash both two chips. You can also flash just the top 4M with a layout file.<br />
<br />
x230-layout.txt:<br />
0x00000000:0x007fffff ifdmegbe<br />
0x00800000:0x00bfffff bios<br />
<br />
flashrom command:<br />
flashrom -p internal --layout x230-layout.txt --image bios --write build/coreboot.rom</div>Dguthttps://www.coreboot.org/index.php?title=Board:lenovo/x230&diff=29906Board:lenovo/x2302017-11-05T00:53:39Z<p>Dgut: added note about flashing just the 4M chip</p>
<hr />
<div>== Status ==<br />
[[Intel_Native_Raminit]] has it's own status page.<br />
<br />
Thanks for your interest in Lenovo X230 port.<br />
Issues:<br />
* Badly seated RAM may prevent booting (not really a problem but coreboot is more suspicious to this than vendor BIOS)<br />
<br />
Tested:<br />
* S3 (Suspend to RAM)<br />
* RAM module combinations of 8G+8G, 8G+0, 0+8G, 4G+8G, 8G+4G, 8G+1G, 1G+0, 0+1G, 4G+0, 0+4G<br />
* USB (both 2.0 and 3.0 ports)<br />
* Video (both internal and VGA)<br />
* Expresscard slot (including hotplugging)<br />
* Sound (integrated speakers, integrated mic, external headphones, external mic)<br />
* LAN<br />
* mini-PCIe slots (both wlan and wwan)<br />
* Linux (through GRUB-as-payload)<br />
* Windows (through GRUB-as-payload loading SeaBIOS image from disk; you have to use extracted VGA blob, dumped from memory isn't good enough)<br />
* SD card slot<br />
* Thermal management<br />
* Fingerprint reader.<br />
* Webcam<br />
* trackpoint<br />
* touchpad<br />
* Fn hotkeys<br />
* Keyboard backlight<br />
* Thinklight.<br />
* bluetooth<br />
* dock<br />
* msata (fixed in commit c8f54a1109072706e2fa091dc9ab4ad3eb057b42)<br />
* mini displayport<br />
* digitizer on x230t variant<br />
<br />
== proprietary components status ==<br />
* CPU Microcode<br />
* VGA Option ROM (optional): you need it if you want graphics in SeaBIOS but most payloads should work without it (text mode or corebootfb mode)<br />
* ME (Management Engine) => you do not have to touch it (just leave it where it is)<br />
* EC (Embedded Controller) => you do not have to touch it (just leave it where it is)<br />
<br />
== Code ==<br />
{{MergedIntoMaster}}<br />
<br />
== Building Firmware ==<br />
Please have a look at [[Intel_Sandybridge_Build_Tutorial]].<br />
<br />
It's actually sufficient to just flash the 4M chip (the one positioned at the top, marked spi1) with an image with CBFS 4M, and a fake IFD, for example with the SeaBIOS payload, or a small Linux payload with Busybox and kexec installed to load kernels. This is because the 4M chip holds the end of the concatenated 12M "opaque flash chip"'s 7M BIOS region, and is largely hardware specific (do *not* flash a Coreboot ROM with a fake IFD to a whole system on other systems!). This is sufficient to boot the system, and will allow one to flash the BIOS region internally later now that Coreboot is installed, taking advantage of the whole 7M (with default layout and not touching the other regions) BIOS region.<br />
<br />
== Flashing ==<br />
<br />
=== Hardware Flashring ===<br />
<br />
'''NOTICE:''' There has been at least one report of a bricked laptop due to just ''reading'' the flash chips' content with an external programmer. Apparently something on the board may break by applying external power.<br />
<br />
X230 has 2 flash chips of 8M and 4M. They're concatenated to one virtual flash chip of 12M which is itself subdivided in roughly in 3 parts:<br />
<br />
* Descriptor (12K)<br />
* ME firmware (5M-12K)<br />
* System flash (7M)<br />
<br />
ME firmware is not readable.<br />
Vendor firmware locks the flash and so you need to flash externally (unless until someone figures out a way around it).<br />
<br />
<gallery><br />
File:X230.jpg<br />
File:X230_chip.jpg<br />
File:X230_clip.jpg<br />
</gallery><br />
<br />
Proceeds as follows:<br />
* Turn off your laptop, remove battery and AC adapter.<br />
* Remove the keyboard.<br />
* Connect your external SPI flasher to the top SPI chip which is under palm resting space, on left side of the board. It's a 4M chip. IF you've chosen CBFS_SIZE 4M or smaller that' the only chip you need to reflash.<br />
<br />
I recommend using SOIC clip. Depending on the flasher you use, you may have to use separate<br />
3.3V source. Make sure not to feed more than 3.3V ot the chip. I used<br />
buspirate as flasher and 3.3V power lines from another computer.<br />
<br />
* Read the flash. Twice. Compare the files to be sure. Save a copy of it on<br />
external media.<br />
flashrom -p <yourprogrammer> -r flash.bin<br />
flashrom -p <yourprogrammer> -r flash2.bin<br />
diff flash.bin flash2.bin<br />
<br />
If they don't match, do not proceed. If the file is 8M, you're flashing wrong chip, connect to the right one.<br />
<br />
* Write the flash. Since you have to write only top 4M, first split out those 4M:<br />
dd of=top.rom bs=1M if=build/coreboot.rom skip=8<br />
<br />
* Use flashrom to flash top.rom.<br />
<br />
If you have trouble reading the chip successfully,<br />
the most common problems are<br />
*insufficient power supply <br />
*bad contacts<br />
*too long wires<br />
*bad pinout<br />
The cable shipped with buspirate was too long, and needed to be trimmed.<br />
<br />
See also [http://flashrom.org/ISP In-System Programming]<br />
<br />
=== Internal Flashing ===<br />
<br />
You can flash internally with flashrom after IFD is unlocked and you have coreboot installed.<br />
<br />
To unlock IFD, use ``ifdtool`` to unlock the 8M part and reflash it:<br />
ifdtool -u ifdmegbe.rom<br />
<br />
The flashrom output is as follows:<br />
<br />
flashrom v0.9.9-rc1-r1942 on Linux 4.4.0-21-generic (x86_64)<br />
flashrom is free software, get the source code at https://flashrom.org<br />
<br />
Calibrating delay loop... OK.<br />
coreboot table found at 0xbff4d000.<br />
Found chipset "Intel QM77".<br />
Enabling flash write... Enabling hardware sequencing due to multiple flash chips detected.<br />
OK.<br />
Found Programmer flash chip "Opaque flash chip" (12288 kB, Programmer-specific) mapped at physical address 0x0000000000000000.<br />
<br />
You can flash both two chips. You can also flash just the top 4M with a layout file.<br />
<br />
x230-layout.txt:<br />
0x00000000:0x007fffff ifdmegbe<br />
0x00800000:0x00bfffff bios<br />
<br />
flashrom command:<br />
flashrom -p internal --layout x230-layout.txt --image bios --write build/coreboot.rom</div>Dguthttps://www.coreboot.org/index.php?title=Linux&diff=29293Linux2017-10-13T15:47:46Z<p>Dgut: /* Configuring Buildroot */</p>
<hr />
<div>== Work in progress ==<br />
<br />
Please keep in mind that this tutorial is a work in progress. Configuration files will be added and changed.<br />
<br />
== Implementations of Linux payloads ==<br />
<br />
* The [[buildrom]] utility can download and compile all required components, but it is not compatible with modern Coreboot.<br />
<br />
* https://github.com/osresearch/heads is also a good example of Linux payloads in practice.<br />
<br />
* There is a page on Coreboot about PetitBoot. See [[Petitboot]].<br />
<br />
== Quick and easy Linux payloads with Buildroot ==<br />
<br />
=== What is Buildroot? ===<br />
<br />
Buildroot is a series of makefiles and a simple configuration interface (kconfig, etc) which makes it easy to build very small embedded systems. The tool is readily available, so we should make use of it to create highly-customized payloads for Coreboot. And yes, we can have sl in our boot firmware!<br />
<br />
This is useful as a Coreboot payload because we can incorporate components like kexec, flashrom, cryptsetup, full gnupg, and embedded tools like Busybox to create a usable system image intended to allow us to boot our computer, or something else entirely.<br />
<br />
Buildroot's build system verifies all of its downloaded packages hashes, including the toolchain, so it's build system is reasonably secure. It does have support for reproducible builds, but more extensive testing is required. It also provides stable releases.<br />
<br />
=== Examples ===<br />
<br />
As a very simple example to build from, let's consider the [board:lenovo/x230|ThinkPad X230]. It has a 4M flash chip and an 8M flash chip, summed together into a "virtual" 12M flash chip. This poses a problem - the BIOS region is 7M, but this is including the 4M chip. It is possible to flash internally, and not have to attach a programmer to each chip and "split" a complete Coreboot image across the two flash chips.<br />
<br />
Due to space constraints, networking doesn't seem possible to incorporate. We need to reduce the size of the compressed initrd image to around 900k. In this tutorial, we create a simple payload that includes Flashrom and the means to mount USB drives, in order to flash an image that takes advantage of the full 7M region (or more, if we reduce the ME region using https://github.com/corna/me_cleaner).<br />
<br />
In order to reduce space, the Musl standard C library was used. This can produce noticeably smaller binaries than uclibc-ng. Furthermore, ncurses was not installed, so no C++ library was included.<br />
<br />
==== Configuring Busybox ====<br />
<br />
We elect to remove all the networking utilities and certain other utilities. Components like udhcpcd and ip took up a lot of space relatively.<br />
<br />
==== Configuring Buildroot ====<br />
<br />
The only package added was Flashrom. This selected dmidecode, pciutils, libusb, and libftdi.<br />
<br />
Select musl-libc as C standard library.<br />
<br />
Do not enable C++ support for size. Programs like ncurses, sl, etc will select this.<br />
<br />
==== Configuring Linux ====<br />
<br />
All non-essential components were removed. We are left with basic support for Intel processors, no network support, and support for ext4 and a few miscellaneous filesystems. It's trivial to enable these again.<br />
<br />
==== Configuring Coreboot ====<br />
<br />
We simply select a Linux payload as our payload, and point to the initrd and kernel image to the respective Buildroot rootfs and bzImage.<br />
<br />
== Future things to think about ==<br />
<br />
* Add an additional option to Coreboot's kconfig to use a stable Buildroot release and include configuration files for a "simple" initrd with support for networking, kexec, flashrom and miscellaneous system utilities.<br />
<br />
== Further Information ==<br />
<br />
* [[QEMU Build Tutorial]]</div>Dguthttps://www.coreboot.org/index.php?title=Linux&diff=28294Linux2017-08-25T14:01:30Z<p>Dgut: Skeleton of tutorial for configuring Linux payloads with Buildroot</p>
<hr />
<div>== Work in progress ==<br />
<br />
Please keep in mind that this tutorial is a work in progress. Configuration files will be added and changed.<br />
<br />
== Implementations of Linux payloads ==<br />
<br />
* The [[buildrom]] utility can download and compile all required components, but it is not compatible with modern Coreboot.<br />
<br />
* https://github.com/osresearch/heads is also a good example of Linux payloads in practice.<br />
<br />
* There is a page on Coreboot about PetitBoot. See [[Petitboot]].<br />
<br />
== Quick and easy Linux payloads with Buildroot ==<br />
<br />
=== What is Buildroot? ===<br />
<br />
Buildroot is a series of makefiles and a simple configuration interface (kconfig, etc) which makes it easy to build very small embedded systems. The tool is readily available, so we should make use of it to create highly-customized payloads for Coreboot. And yes, we can have sl in our boot firmware!<br />
<br />
This is useful as a Coreboot payload because we can incorporate components like kexec, flashrom, cryptsetup, full gnupg, and embedded tools like Busybox to create a usable system image intended to allow us to boot our computer, or something else entirely.<br />
<br />
Buildroot's build system verifies all of its downloaded packages hashes, including the toolchain, so it's build system is reasonably secure. It does have support for reproducible builds, but more extensive testing is required. It also provides stable releases.<br />
<br />
=== Examples ===<br />
<br />
As a very simple example to build from, let's consider the [board:lenovo/x230|ThinkPad X230]. It has a 4M flash chip and an 8M flash chip, summed together into a "virtual" 12M flash chip. This poses a problem - the BIOS region is 7M, but this is including the 4M chip. It is possible to flash internally, and not have to attach a programmer to each chip and "split" a complete Coreboot image across the two flash chips.<br />
<br />
Due to space constraints, networking doesn't seem possible to incorporate. We need to reduce the size of the compressed initrd image to around 900k. In this tutorial, we create a simple payload that includes Flashrom and the means to mount USB drives, in order to flash an image that takes advantage of the full 7M region (or more, if we reduce the ME region using https://github.com/corna/me_cleaner).<br />
<br />
In order to reduce space, the Musl standard C library was used. This can produce noticeably smaller binaries than uclibc-ng. Furthermore, ncurses was not installed, so no C++ library was included.<br />
<br />
==== Configuring Busybox ====<br />
<br />
We elect to remove all the networking utilities and certain other utilities. Components like udhcpcd and ip took up a lot of space relatively.<br />
<br />
==== Configuring Buildroot ====<br />
<br />
The only package added was Flashrom. This selected dmidecode, pciutils, libusb, and libftdi.<br />
<br />
==== Configuring Linux ====<br />
<br />
All non-essential components were removed. We are left with basic support for Intel processors, no network support, and support for ext4 and a few miscellaneous filesystems. It's trivial to enable these again.<br />
<br />
==== Configuring Coreboot ====<br />
<br />
We simply select a Linux payload as our payload, and point to the initrd and kernel image to the respective Buildroot rootfs and bzImage.<br />
<br />
== Future things to think about ==<br />
<br />
* Add an additional option to Coreboot's kconfig to use a stable Buildroot release and include configuration files for a "simple" initrd with support for networking, kexec, flashrom and miscellaneous system utilities.<br />
<br />
== Further Information ==<br />
<br />
* [[QEMU Build Tutorial]]</div>Dguthttps://www.coreboot.org/index.php?title=BeagleBone_Black_-_screwdriver&diff=20974BeagleBone Black - screwdriver2016-09-13T17:04:11Z<p>Dgut: /* Basic usage */</p>
<hr />
<div>A tool for coreboot/libreboot/flashrom developers and users. The firmware itself is based on vanilla OpenWrt Chaos Calmer(15.04) with some modifications. This firmware is mainly intended for BeagleBone Black (BBB).<br />
<br />
<br />
== Installing screwdriver ==<br />
<br />
To install screwdriver on the BeagleBone Black you have to create a bootable memory with the screwdriver.<br />
In this example we use a Micro-SD card. The card should be at least 128MB big.<br />
<br />
<br />
1. Download recent screwdriver Version 0.3.0 from <br />
http://repo.fe80.eu/screwdriver/0.3.0/omap/generic/default/openwrt-0.3.0-omap-beagleboneblack-sdcard-vfat-am335x_evm.img<br />
(sha512sum: 685f72aaa14342c848f15c933ea4f80deb33cd3751457e3e19e3b101659d2b96bae7f7be33b542cfdc4750cdd27e7e47ce35ffba15a5c2e76f8c41e7aad05f69 )<br />
<br />
2. Insert the memory you want to install screwdriver on into your computer.<br />
<br />
Linux users can check the latest messages in <code>dmesg</code> and if the memory is listed as /dev/sdb this have to be used together with 'dd' for installation from inside the directory containing the downloaded .img file:<br />
<code>sudo dd if=openwrt-0.3.0-omap-beagleboneblack-sdcard-vfat-am335x_evm.img of=/dev/sdb bs=4M</code><br />
<br />
Windows users have to use additional software like 'Win32 Disk Imager' from here: https://sourceforge.net/projects/win32diskimager/<br />
<br />
3. Now you can insert the memory into your BeagleBone Black.<br />
<br />
<br />
== Starting screwdriver ==<br />
<br />
In most cases screwdriver boots automatically when the memory is inserted and then the power(external 5V power plug). If not there are three solutions: <br />
<br />
1) This should always work: Delete/wipe the internal memory of the BeagleBone black. This would force the BeagleBone Black to always boot from the memory you inserted.<br />
<br />
2) Pressing and holding every time the 'User Boot' button. This is the button next to the big, regular USB port.<br />
<br />
3) Rewrite internal memory to a recent official debian+u-boot image. It boots then automatically when you insert the screwdriver memory.<br />
<br />
== Basic usage ==<br />
<br />
There are two recommended ways to connect to the terminal of the screwdriver.<br />
<br />
First and always working: Use a USB to TTL (for example CP2104 for about 2$) adapter and connect it to the serial port of the BeagleBone Black.<br />
You have to use just 3 wires. Ground, TX and RX. Connect your ttl-adapter ground to serial pin 1 (the one with the white dot), RX to serial pin 4 and TX to serial pin 5.<br />
For the serial connection you can use for example <code>minicom -s</code>. In most cases on a linux machine the usb-ttl adapter gets: /dev/ttyUSB0 . The BeagleBone Black default serial speed is 115200.<br />
<br />
Second: Use a network cable and ssh. There is a dhcp server (192.168.1.1) running on the screwdriver. Log in as root with the password coreboot.<br />
<br />
== Using screwdriver for flashing SPI flash with flashrom ==<br />
<br />
screwdriver already have flashrom preinstalled and the BeagleBone Black have connectors you can flash SPI flash memory with.<br />
<br />
You can flash SPI flash chips that are not 'in-circuit' without the need of additional power source. The light 3,3V rail the BeagleBone Black delivers can power the SPI chip if you power up the BeagleBone Black with at least 5V 1,2A power supply over its round power connector.<br />
<br />
This is a good article with pictures how to wire the BeagleBone Black to a SPI flash chip: https://www.linux.com/learn/tutorials/746860-how-to-access-chips-over-the-spi-on-beaglebone-black/<br />
<br />
Connectors:<br />
<br />
{| class="wikitable"<br />
!|BeagleBoneBlack||Pin on P9(written next to the big connector board)||SPI||SPI SOIC8 Pin||SOIC16||CPU||DTS<br />
|-<br />
|I2C1_SCL||17||CS||1||7||A16||spi0_cs0<br />
|-<br />
|I2C1_SDA||18||MOSI||5||15||B16||spi0_d1<br />
|-<br />
|UART2_RXD||22||CLK||6||16||A17||spi0_sclk<br />
|-<br />
|UART2_TXD||21||MISO||2||8||B17||spi0_d0<br />
|-<br />
|GND||1 + 2||GND||4||10||GND||GND<br />
|-<br />
|VDD_3V3D||3 + 4||VCC||8||2||VDD_3V3D||VDD_3V3D<br />
|-<br />
|}<br />
<br />
After wiring everything up you can flash with this command:<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0 -w yourfile</code> If you get the warning in flashrom that the flash chip is unsupported, you can force the flash with additional '-f' command and if everything worked fine, please directly report a logfile of the flash to the flashrom developers.<br />
<br />
<br />
<br />
== Using screwdriver as USB EHCI debugging tool ==<br />
<br />
The BeagleBone Black have a great free(as in freedom) and flexible architecture we can use for USB EHCI debugging. It have to be powered by external power supply over the round power connector.<br />
You need: mini-usb cable<br />
Connect the mini-usb cable to the EHCI debug port of your device you want to debug coreboot/libreboot on. If you are not sure what usb port is using ehci debug, you can just try all of them out.<br />
<br />
To run USB EHCI debugging you have to run:<br />
<code>screen /dev/ttyGS0</code><br />
<code>cat /dev/ttyGS0 | tee -a /tmp/output</code><br />
<br />
Then power on the target you want to debug and you would hopefully see the debug output.<br />
<br />
== Using screwdriver for flashing SPI flash with flashrom - IN-CIRCUIT ==<br />
<br />
=== Prerequisites ===<br />
We can flash an SPI flash chip in-circuit, providing we have an external power source.<br />
We will need<br />
* Power source for BeagleBone Black: USB (connected to computer or standard wall supply) or 5V barrel connector<br />
* Power source for SPI Flash chip, 3.3V. Ideally, we should use a lab Power Supply Unit as it is possible to vary the voltage easily and be sure we are getting the required voltage. It may not be possible to power the flash chip from the BeagleBone Black's 3.3V pin as it is too unreliable. Some guides also recommend an ATX PSU, but this may not be reliable, and at any rate it is good practice to check if the PSU is actually outputting 3.3V!<br />
* Ideally, a clip over the SPI chip, such as those sold by Pomona: http://uk.farnell.com/pomona/5252/test-clip-16-pos-1-27mm-soj-soic/dp/2406245. This clip is for SOIC-16 chips with 16 pins but other sizes are available e.g. for SOIC-8 chips. You should check what size your flash chip is by opening up the computer and identifying the chip. We can also solder the wires carefully, but the clip makes it easy to troubleshoot wiring issues. Other similar clips may work.<br />
* We should obtain wires. If we solder the flash chip the size doesn't matter, but we should use jumper cables for the SPI clip, with 2.54mm / 0.1" headers. Make sure to cut the wires as short as possible, less than 10cm, as interference may result in Flashrom not detecting the chip properly, or not at all.<br />
<br />
=== Wiring the flash chip to the BeagleBone Black and power supply ===<br />
<br />
Do not directly rest the BeagleBone Black on the computer motherboard which you are flashing, otherwise static electricity could damage components on the motherboard during flashing. <br />
<br />
These numbers correspond to pins on the BeagleBone:<br />
NC - - 21<br />
1 - - 17<br />
NC - - NC<br />
NC - - NC<br />
NC - - NC<br />
NC - - NC<br />
18 - - 3.3V (PSU)<br />
22 - - NC - pin 1 on flash chip<br />
<br />
Consult the BeagleBone documentation if you are unsure how the pins on the BeagleBone are numbered.<br />
Remember to connect pin 2 of the BeagleBone to the ground of the power supply.<br />
<br />
=== Testing connection ===<br />
<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128</code><br />
<br />
* Note that the SPI speed can be higher, if you want faster speeds. However, faster speeds are less stable. From experience, Flashrom sometimes doesn't detect the chip if there is too much interference, so a slower speed may be ideal. It may be possible to achieve over 512Hz as the SPI speed.<br />
* If Flashrom isn't sure what type of SPI chip you have after it detects the chip, you will need to open up the computer and look at what variation is printed on the chip. You will probably need a magnifying glass or microscope for this and some bright light. If you can't work it out, look on the internet and see what SPI chips your computer typically was manufactured with. You then specify with the -c option when you are using Flashrom to read or write the flash.<br />
<br />
=== Dump factory ROM image ===<br />
<br />
We should dump the factory ROM image in case the flashing process goes wrong somehow or the computer does not boot.<br />
<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128 -r factory.rom</code><br />
<br />
Now we verify the dumped image: <br />
<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128 --verify factory.rom</code><br />
<br />
You might want to do this multiple times too just to be sure that the dumped image was read correctly.<br />
<br />
=== Write your compiled image ===<br />
<br />
You will now send your compiled Coreboot ROM (or whatever ROM you're flashing to the SPI chip) to the BeagleBone, such as through scp. If you have connected through SSH this is easy.<br />
Assuming the ROM is called "rom.rom", run <br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128 -w rom.rom -V</code> <br />
<br />
This may take a long time, especially at 128Hz. Experiment with higher SPI speeds to see how fast you can use Flashrom while achieving stability. For an 8k SPI chip it may take around 30 minutes at SPI speed of 128Hz.<br />
<br />
=== Further notes ===<br />
<br />
Some of this was copied from the Libreboot page on programming SPI chips with the BeagleBone Black: https://libreboot.org/docs/install/bbb_setup.html. This is a good resource, and it has further notes about achieving stability during flashing. There are also more images to illustrate setup.<br />
<br />
== older/outdated screwdriver versions ==<br />
<br />
Version 0.2: http://repo.fe80.eu/screwdriver/0.2/omap/generic/openwrt-0.2-omap-beagleboneblack-sdcard-vfat-am335x_evm.img<br />
sha512sum: 26fc145b4b43b2589d500429c3bba379612870a63c2c03388cd663345a7c3a0792efc97cf3546c1e53b5d7eb958d43b9d21a9d6d0e4f13dd03f29878ef8dc753<br />
<br />
== references ==<br />
<br />
The official screwdriver development repository: https://github.com/lynxis/bbb_screwdriver_builder<br />
<br />
1. how to wire spi chip: http://www.linux.com/learn/tutorials/746860-how-to-access-chips-over-the-spi-on-beaglebone-black/<br />
<br />
2. Beagle bone black shematics: https://raw.githubusercontent.com/CircuitCo/BeagleBone-Black/master/BBB_SRM.pdf<br />
<br />
3. BeagleBone CPU datasheet: http://www.ti.com/lit/ds/symlink/am3358.pdf<br />
<br />
4. am335x CPU technical reference: http://www.ti.com/lit/ug/spruh73l/spruh73l.pdf</div>Dguthttps://www.coreboot.org/index.php?title=BeagleBone_Black_-_screwdriver&diff=20973BeagleBone Black - screwdriver2016-09-13T17:02:54Z<p>Dgut: /* Starting screwdriver */ Edited for clarity</p>
<hr />
<div>A tool for coreboot/libreboot/flashrom developers and users. The firmware itself is based on vanilla OpenWrt Chaos Calmer(15.04) with some modifications. This firmware is mainly intended for BeagleBone Black (BBB).<br />
<br />
<br />
== Installing screwdriver ==<br />
<br />
To install screwdriver on the BeagleBone Black you have to create a bootable memory with the screwdriver.<br />
In this example we use a Micro-SD card. The card should be at least 128MB big.<br />
<br />
<br />
1. Download recent screwdriver Version 0.3.0 from <br />
http://repo.fe80.eu/screwdriver/0.3.0/omap/generic/default/openwrt-0.3.0-omap-beagleboneblack-sdcard-vfat-am335x_evm.img<br />
(sha512sum: 685f72aaa14342c848f15c933ea4f80deb33cd3751457e3e19e3b101659d2b96bae7f7be33b542cfdc4750cdd27e7e47ce35ffba15a5c2e76f8c41e7aad05f69 )<br />
<br />
2. Insert the memory you want to install screwdriver on into your computer.<br />
<br />
Linux users can check the latest messages in <code>dmesg</code> and if the memory is listed as /dev/sdb this have to be used together with 'dd' for installation from inside the directory containing the downloaded .img file:<br />
<code>sudo dd if=openwrt-0.3.0-omap-beagleboneblack-sdcard-vfat-am335x_evm.img of=/dev/sdb bs=4M</code><br />
<br />
Windows users have to use additional software like 'Win32 Disk Imager' from here: https://sourceforge.net/projects/win32diskimager/<br />
<br />
3. Now you can insert the memory into your BeagleBone Black.<br />
<br />
<br />
== Starting screwdriver ==<br />
<br />
In most cases screwdriver boots automatically when the memory is inserted and then the power(external 5V power plug). If not there are three solutions: <br />
<br />
1) This should always work: Delete/wipe the internal memory of the BeagleBone black. This would force the BeagleBone Black to always boot from the memory you inserted.<br />
<br />
2) Pressing and holding every time the 'User Boot' button. This is the button next to the big, regular USB port.<br />
<br />
3) Rewrite internal memory to a recent official debian+u-boot image. It boots then automatically when you insert the screwdriver memory.<br />
<br />
== Basic usage ==<br />
<br />
There are two recommended ways to connect to the terminal of the screwdriver.<br />
<br />
First and always working: Use a USB to TTL (for example CP2104 for about 2$) adapter and connect it to the serial port of the BeagleBone Black.<br />
You have to use just 3 wires. Ground, TX and RX. Connect your ttl-adapter ground to serial pin 1 (the one with the white dot), RX to serial pin 4 and TX to serial pin 5.<br />
For the serial connection you can use for example <code>minicom -s</code>. In most cases on a linux machine the usb-ttl adapter gets: /dev/ttyUSB0 . The BeagleBone Black default serial speed is 115200.<br />
<br />
Second: Use a network cable and ssh. There is a dhcp server (192.168.1.1) running on the screwdriver.<br />
<br />
== Using screwdriver for flashing SPI flash with flashrom ==<br />
<br />
screwdriver already have flashrom preinstalled and the BeagleBone Black have connectors you can flash SPI flash memory with.<br />
<br />
You can flash SPI flash chips that are not 'in-circuit' without the need of additional power source. The light 3,3V rail the BeagleBone Black delivers can power the SPI chip if you power up the BeagleBone Black with at least 5V 1,2A power supply over its round power connector.<br />
<br />
This is a good article with pictures how to wire the BeagleBone Black to a SPI flash chip: https://www.linux.com/learn/tutorials/746860-how-to-access-chips-over-the-spi-on-beaglebone-black/<br />
<br />
Connectors:<br />
<br />
{| class="wikitable"<br />
!|BeagleBoneBlack||Pin on P9(written next to the big connector board)||SPI||SPI SOIC8 Pin||SOIC16||CPU||DTS<br />
|-<br />
|I2C1_SCL||17||CS||1||7||A16||spi0_cs0<br />
|-<br />
|I2C1_SDA||18||MOSI||5||15||B16||spi0_d1<br />
|-<br />
|UART2_RXD||22||CLK||6||16||A17||spi0_sclk<br />
|-<br />
|UART2_TXD||21||MISO||2||8||B17||spi0_d0<br />
|-<br />
|GND||1 + 2||GND||4||10||GND||GND<br />
|-<br />
|VDD_3V3D||3 + 4||VCC||8||2||VDD_3V3D||VDD_3V3D<br />
|-<br />
|}<br />
<br />
After wiring everything up you can flash with this command:<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0 -w yourfile</code> If you get the warning in flashrom that the flash chip is unsupported, you can force the flash with additional '-f' command and if everything worked fine, please directly report a logfile of the flash to the flashrom developers.<br />
<br />
<br />
<br />
== Using screwdriver as USB EHCI debugging tool ==<br />
<br />
The BeagleBone Black have a great free(as in freedom) and flexible architecture we can use for USB EHCI debugging. It have to be powered by external power supply over the round power connector.<br />
You need: mini-usb cable<br />
Connect the mini-usb cable to the EHCI debug port of your device you want to debug coreboot/libreboot on. If you are not sure what usb port is using ehci debug, you can just try all of them out.<br />
<br />
To run USB EHCI debugging you have to run:<br />
<code>screen /dev/ttyGS0</code><br />
<code>cat /dev/ttyGS0 | tee -a /tmp/output</code><br />
<br />
Then power on the target you want to debug and you would hopefully see the debug output.<br />
<br />
== Using screwdriver for flashing SPI flash with flashrom - IN-CIRCUIT ==<br />
<br />
=== Prerequisites ===<br />
We can flash an SPI flash chip in-circuit, providing we have an external power source.<br />
We will need<br />
* Power source for BeagleBone Black: USB (connected to computer or standard wall supply) or 5V barrel connector<br />
* Power source for SPI Flash chip, 3.3V. Ideally, we should use a lab Power Supply Unit as it is possible to vary the voltage easily and be sure we are getting the required voltage. It may not be possible to power the flash chip from the BeagleBone Black's 3.3V pin as it is too unreliable. Some guides also recommend an ATX PSU, but this may not be reliable, and at any rate it is good practice to check if the PSU is actually outputting 3.3V!<br />
* Ideally, a clip over the SPI chip, such as those sold by Pomona: http://uk.farnell.com/pomona/5252/test-clip-16-pos-1-27mm-soj-soic/dp/2406245. This clip is for SOIC-16 chips with 16 pins but other sizes are available e.g. for SOIC-8 chips. You should check what size your flash chip is by opening up the computer and identifying the chip. We can also solder the wires carefully, but the clip makes it easy to troubleshoot wiring issues. Other similar clips may work.<br />
* We should obtain wires. If we solder the flash chip the size doesn't matter, but we should use jumper cables for the SPI clip, with 2.54mm / 0.1" headers. Make sure to cut the wires as short as possible, less than 10cm, as interference may result in Flashrom not detecting the chip properly, or not at all.<br />
<br />
=== Wiring the flash chip to the BeagleBone Black and power supply ===<br />
<br />
Do not directly rest the BeagleBone Black on the computer motherboard which you are flashing, otherwise static electricity could damage components on the motherboard during flashing. <br />
<br />
These numbers correspond to pins on the BeagleBone:<br />
NC - - 21<br />
1 - - 17<br />
NC - - NC<br />
NC - - NC<br />
NC - - NC<br />
NC - - NC<br />
18 - - 3.3V (PSU)<br />
22 - - NC - pin 1 on flash chip<br />
<br />
Consult the BeagleBone documentation if you are unsure how the pins on the BeagleBone are numbered.<br />
Remember to connect pin 2 of the BeagleBone to the ground of the power supply.<br />
<br />
=== Testing connection ===<br />
<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128</code><br />
<br />
* Note that the SPI speed can be higher, if you want faster speeds. However, faster speeds are less stable. From experience, Flashrom sometimes doesn't detect the chip if there is too much interference, so a slower speed may be ideal. It may be possible to achieve over 512Hz as the SPI speed.<br />
* If Flashrom isn't sure what type of SPI chip you have after it detects the chip, you will need to open up the computer and look at what variation is printed on the chip. You will probably need a magnifying glass or microscope for this and some bright light. If you can't work it out, look on the internet and see what SPI chips your computer typically was manufactured with. You then specify with the -c option when you are using Flashrom to read or write the flash.<br />
<br />
=== Dump factory ROM image ===<br />
<br />
We should dump the factory ROM image in case the flashing process goes wrong somehow or the computer does not boot.<br />
<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128 -r factory.rom</code><br />
<br />
Now we verify the dumped image: <br />
<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128 --verify factory.rom</code><br />
<br />
You might want to do this multiple times too just to be sure that the dumped image was read correctly.<br />
<br />
=== Write your compiled image ===<br />
<br />
You will now send your compiled Coreboot ROM (or whatever ROM you're flashing to the SPI chip) to the BeagleBone, such as through scp. If you have connected through SSH this is easy.<br />
Assuming the ROM is called "rom.rom", run <br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128 -w rom.rom -V</code> <br />
<br />
This may take a long time, especially at 128Hz. Experiment with higher SPI speeds to see how fast you can use Flashrom while achieving stability. For an 8k SPI chip it may take around 30 minutes at SPI speed of 128Hz.<br />
<br />
=== Further notes ===<br />
<br />
Some of this was copied from the Libreboot page on programming SPI chips with the BeagleBone Black: https://libreboot.org/docs/install/bbb_setup.html. This is a good resource, and it has further notes about achieving stability during flashing. There are also more images to illustrate setup.<br />
<br />
== older/outdated screwdriver versions ==<br />
<br />
Version 0.2: http://repo.fe80.eu/screwdriver/0.2/omap/generic/openwrt-0.2-omap-beagleboneblack-sdcard-vfat-am335x_evm.img<br />
sha512sum: 26fc145b4b43b2589d500429c3bba379612870a63c2c03388cd663345a7c3a0792efc97cf3546c1e53b5d7eb958d43b9d21a9d6d0e4f13dd03f29878ef8dc753<br />
<br />
== references ==<br />
<br />
The official screwdriver development repository: https://github.com/lynxis/bbb_screwdriver_builder<br />
<br />
1. how to wire spi chip: http://www.linux.com/learn/tutorials/746860-how-to-access-chips-over-the-spi-on-beaglebone-black/<br />
<br />
2. Beagle bone black shematics: https://raw.githubusercontent.com/CircuitCo/BeagleBone-Black/master/BBB_SRM.pdf<br />
<br />
3. BeagleBone CPU datasheet: http://www.ti.com/lit/ds/symlink/am3358.pdf<br />
<br />
4. am335x CPU technical reference: http://www.ti.com/lit/ug/spruh73l/spruh73l.pdf</div>Dguthttps://www.coreboot.org/index.php?title=BeagleBone_Black_-_screwdriver&diff=20972BeagleBone Black - screwdriver2016-09-13T17:02:06Z<p>Dgut: /* Starting screwdriver */</p>
<hr />
<div>A tool for coreboot/libreboot/flashrom developers and users. The firmware itself is based on vanilla OpenWrt Chaos Calmer(15.04) with some modifications. This firmware is mainly intended for BeagleBone Black (BBB).<br />
<br />
<br />
== Installing screwdriver ==<br />
<br />
To install screwdriver on the BeagleBone Black you have to create a bootable memory with the screwdriver.<br />
In this example we use a Micro-SD card. The card should be at least 128MB big.<br />
<br />
<br />
1. Download recent screwdriver Version 0.3.0 from <br />
http://repo.fe80.eu/screwdriver/0.3.0/omap/generic/default/openwrt-0.3.0-omap-beagleboneblack-sdcard-vfat-am335x_evm.img<br />
(sha512sum: 685f72aaa14342c848f15c933ea4f80deb33cd3751457e3e19e3b101659d2b96bae7f7be33b542cfdc4750cdd27e7e47ce35ffba15a5c2e76f8c41e7aad05f69 )<br />
<br />
2. Insert the memory you want to install screwdriver on into your computer.<br />
<br />
Linux users can check the latest messages in <code>dmesg</code> and if the memory is listed as /dev/sdb this have to be used together with 'dd' for installation from inside the directory containing the downloaded .img file:<br />
<code>sudo dd if=openwrt-0.3.0-omap-beagleboneblack-sdcard-vfat-am335x_evm.img of=/dev/sdb bs=4M</code><br />
<br />
Windows users have to use additional software like 'Win32 Disk Imager' from here: https://sourceforge.net/projects/win32diskimager/<br />
<br />
3. Now you can insert the memory into your BeagleBone Black.<br />
<br />
<br />
== Starting screwdriver ==<br />
<br />
=== Troubleshooting ===<br />
<br />
In most cases screwdriver boots automatically when the memory is inserted and then the power(external 5V power plug).<br />
<br />
1) The first solution that should always work: Delete/wipe the internal memory of the BeagleBone black. This would force the BeagleBone Black to always boot from the memory you inserted.<br />
<br />
2) Pressing and holding every time the 'User Boot' button. This is the button next to the big, regular USB port.<br />
<br />
3) Rewrite internal memory to a recent official debian+u-boot image. It boots then automatically when you insert the screwdriver memory.<br />
<br />
== Basic usage ==<br />
<br />
There are two recommended ways to connect to the terminal of the screwdriver.<br />
<br />
First and always working: Use a USB to TTL (for example CP2104 for about 2$) adapter and connect it to the serial port of the BeagleBone Black.<br />
You have to use just 3 wires. Ground, TX and RX. Connect your ttl-adapter ground to serial pin 1 (the one with the white dot), RX to serial pin 4 and TX to serial pin 5.<br />
For the serial connection you can use for example <code>minicom -s</code>. In most cases on a linux machine the usb-ttl adapter gets: /dev/ttyUSB0 . The BeagleBone Black default serial speed is 115200.<br />
<br />
Second: Use a network cable and ssh. There is a dhcp server (192.168.1.1) running on the screwdriver.<br />
<br />
== Using screwdriver for flashing SPI flash with flashrom ==<br />
<br />
screwdriver already have flashrom preinstalled and the BeagleBone Black have connectors you can flash SPI flash memory with.<br />
<br />
You can flash SPI flash chips that are not 'in-circuit' without the need of additional power source. The light 3,3V rail the BeagleBone Black delivers can power the SPI chip if you power up the BeagleBone Black with at least 5V 1,2A power supply over its round power connector.<br />
<br />
This is a good article with pictures how to wire the BeagleBone Black to a SPI flash chip: https://www.linux.com/learn/tutorials/746860-how-to-access-chips-over-the-spi-on-beaglebone-black/<br />
<br />
Connectors:<br />
<br />
{| class="wikitable"<br />
!|BeagleBoneBlack||Pin on P9(written next to the big connector board)||SPI||SPI SOIC8 Pin||SOIC16||CPU||DTS<br />
|-<br />
|I2C1_SCL||17||CS||1||7||A16||spi0_cs0<br />
|-<br />
|I2C1_SDA||18||MOSI||5||15||B16||spi0_d1<br />
|-<br />
|UART2_RXD||22||CLK||6||16||A17||spi0_sclk<br />
|-<br />
|UART2_TXD||21||MISO||2||8||B17||spi0_d0<br />
|-<br />
|GND||1 + 2||GND||4||10||GND||GND<br />
|-<br />
|VDD_3V3D||3 + 4||VCC||8||2||VDD_3V3D||VDD_3V3D<br />
|-<br />
|}<br />
<br />
After wiring everything up you can flash with this command:<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0 -w yourfile</code> If you get the warning in flashrom that the flash chip is unsupported, you can force the flash with additional '-f' command and if everything worked fine, please directly report a logfile of the flash to the flashrom developers.<br />
<br />
<br />
<br />
== Using screwdriver as USB EHCI debugging tool ==<br />
<br />
The BeagleBone Black have a great free(as in freedom) and flexible architecture we can use for USB EHCI debugging. It have to be powered by external power supply over the round power connector.<br />
You need: mini-usb cable<br />
Connect the mini-usb cable to the EHCI debug port of your device you want to debug coreboot/libreboot on. If you are not sure what usb port is using ehci debug, you can just try all of them out.<br />
<br />
To run USB EHCI debugging you have to run:<br />
<code>screen /dev/ttyGS0</code><br />
<code>cat /dev/ttyGS0 | tee -a /tmp/output</code><br />
<br />
Then power on the target you want to debug and you would hopefully see the debug output.<br />
<br />
== Using screwdriver for flashing SPI flash with flashrom - IN-CIRCUIT ==<br />
<br />
=== Prerequisites ===<br />
We can flash an SPI flash chip in-circuit, providing we have an external power source.<br />
We will need<br />
* Power source for BeagleBone Black: USB (connected to computer or standard wall supply) or 5V barrel connector<br />
* Power source for SPI Flash chip, 3.3V. Ideally, we should use a lab Power Supply Unit as it is possible to vary the voltage easily and be sure we are getting the required voltage. It may not be possible to power the flash chip from the BeagleBone Black's 3.3V pin as it is too unreliable. Some guides also recommend an ATX PSU, but this may not be reliable, and at any rate it is good practice to check if the PSU is actually outputting 3.3V!<br />
* Ideally, a clip over the SPI chip, such as those sold by Pomona: http://uk.farnell.com/pomona/5252/test-clip-16-pos-1-27mm-soj-soic/dp/2406245. This clip is for SOIC-16 chips with 16 pins but other sizes are available e.g. for SOIC-8 chips. You should check what size your flash chip is by opening up the computer and identifying the chip. We can also solder the wires carefully, but the clip makes it easy to troubleshoot wiring issues. Other similar clips may work.<br />
* We should obtain wires. If we solder the flash chip the size doesn't matter, but we should use jumper cables for the SPI clip, with 2.54mm / 0.1" headers. Make sure to cut the wires as short as possible, less than 10cm, as interference may result in Flashrom not detecting the chip properly, or not at all.<br />
<br />
=== Wiring the flash chip to the BeagleBone Black and power supply ===<br />
<br />
Do not directly rest the BeagleBone Black on the computer motherboard which you are flashing, otherwise static electricity could damage components on the motherboard during flashing. <br />
<br />
These numbers correspond to pins on the BeagleBone:<br />
NC - - 21<br />
1 - - 17<br />
NC - - NC<br />
NC - - NC<br />
NC - - NC<br />
NC - - NC<br />
18 - - 3.3V (PSU)<br />
22 - - NC - pin 1 on flash chip<br />
<br />
Consult the BeagleBone documentation if you are unsure how the pins on the BeagleBone are numbered.<br />
Remember to connect pin 2 of the BeagleBone to the ground of the power supply.<br />
<br />
=== Testing connection ===<br />
<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128</code><br />
<br />
* Note that the SPI speed can be higher, if you want faster speeds. However, faster speeds are less stable. From experience, Flashrom sometimes doesn't detect the chip if there is too much interference, so a slower speed may be ideal. It may be possible to achieve over 512Hz as the SPI speed.<br />
* If Flashrom isn't sure what type of SPI chip you have after it detects the chip, you will need to open up the computer and look at what variation is printed on the chip. You will probably need a magnifying glass or microscope for this and some bright light. If you can't work it out, look on the internet and see what SPI chips your computer typically was manufactured with. You then specify with the -c option when you are using Flashrom to read or write the flash.<br />
<br />
=== Dump factory ROM image ===<br />
<br />
We should dump the factory ROM image in case the flashing process goes wrong somehow or the computer does not boot.<br />
<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128 -r factory.rom</code><br />
<br />
Now we verify the dumped image: <br />
<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128 --verify factory.rom</code><br />
<br />
You might want to do this multiple times too just to be sure that the dumped image was read correctly.<br />
<br />
=== Write your compiled image ===<br />
<br />
You will now send your compiled Coreboot ROM (or whatever ROM you're flashing to the SPI chip) to the BeagleBone, such as through scp. If you have connected through SSH this is easy.<br />
Assuming the ROM is called "rom.rom", run <br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128 -w rom.rom -V</code> <br />
<br />
This may take a long time, especially at 128Hz. Experiment with higher SPI speeds to see how fast you can use Flashrom while achieving stability. For an 8k SPI chip it may take around 30 minutes at SPI speed of 128Hz.<br />
<br />
=== Further notes ===<br />
<br />
Some of this was copied from the Libreboot page on programming SPI chips with the BeagleBone Black: https://libreboot.org/docs/install/bbb_setup.html. This is a good resource, and it has further notes about achieving stability during flashing. There are also more images to illustrate setup.<br />
<br />
== older/outdated screwdriver versions ==<br />
<br />
Version 0.2: http://repo.fe80.eu/screwdriver/0.2/omap/generic/openwrt-0.2-omap-beagleboneblack-sdcard-vfat-am335x_evm.img<br />
sha512sum: 26fc145b4b43b2589d500429c3bba379612870a63c2c03388cd663345a7c3a0792efc97cf3546c1e53b5d7eb958d43b9d21a9d6d0e4f13dd03f29878ef8dc753<br />
<br />
== references ==<br />
<br />
The official screwdriver development repository: https://github.com/lynxis/bbb_screwdriver_builder<br />
<br />
1. how to wire spi chip: http://www.linux.com/learn/tutorials/746860-how-to-access-chips-over-the-spi-on-beaglebone-black/<br />
<br />
2. Beagle bone black shematics: https://raw.githubusercontent.com/CircuitCo/BeagleBone-Black/master/BBB_SRM.pdf<br />
<br />
3. BeagleBone CPU datasheet: http://www.ti.com/lit/ds/symlink/am3358.pdf<br />
<br />
4. am335x CPU technical reference: http://www.ti.com/lit/ug/spruh73l/spruh73l.pdf</div>Dguthttps://www.coreboot.org/index.php?title=BeagleBone_Black_-_screwdriver&diff=20971BeagleBone Black - screwdriver2016-09-13T17:01:37Z<p>Dgut: /* Starting screwdriver */ Edited this section for clarity and added some stuff from old page</p>
<hr />
<div>A tool for coreboot/libreboot/flashrom developers and users. The firmware itself is based on vanilla OpenWrt Chaos Calmer(15.04) with some modifications. This firmware is mainly intended for BeagleBone Black (BBB).<br />
<br />
<br />
== Installing screwdriver ==<br />
<br />
To install screwdriver on the BeagleBone Black you have to create a bootable memory with the screwdriver.<br />
In this example we use a Micro-SD card. The card should be at least 128MB big.<br />
<br />
<br />
1. Download recent screwdriver Version 0.3.0 from <br />
http://repo.fe80.eu/screwdriver/0.3.0/omap/generic/default/openwrt-0.3.0-omap-beagleboneblack-sdcard-vfat-am335x_evm.img<br />
(sha512sum: 685f72aaa14342c848f15c933ea4f80deb33cd3751457e3e19e3b101659d2b96bae7f7be33b542cfdc4750cdd27e7e47ce35ffba15a5c2e76f8c41e7aad05f69 )<br />
<br />
2. Insert the memory you want to install screwdriver on into your computer.<br />
<br />
Linux users can check the latest messages in <code>dmesg</code> and if the memory is listed as /dev/sdb this have to be used together with 'dd' for installation from inside the directory containing the downloaded .img file:<br />
<code>sudo dd if=openwrt-0.3.0-omap-beagleboneblack-sdcard-vfat-am335x_evm.img of=/dev/sdb bs=4M</code><br />
<br />
Windows users have to use additional software like 'Win32 Disk Imager' from here: https://sourceforge.net/projects/win32diskimager/<br />
<br />
3. Now you can insert the memory into your BeagleBone Black.<br />
<br />
<br />
== Starting screwdriver ==<br />
<br />
=== Troubleshooting ===<br />
<br />
In most cases screwdriver boots automatically when the memory is inserted and then the power(external 5V power plug).<br />
<br />
1) The first solution that should always work: Delete/wipe the internal memory of the BeagleBone black. This would force the BeagleBone Black to always boot from the memory you inserted.<br />
<br />
2) Pressing and holding every time the 'User Boot' button. This is the button next to the big, regular USB port.<br />
<br />
3) Rewrite internal memory to a recent official debian+u-boot image. It boots then automatically when you insert the screwdriver memory.<br />
<br />
=== Logging in ===<br />
<br />
You can connect via a serial TTL 3.3V cable (Connector J1 - Pin1 GND, Pin4 RX, Pin5 TX)<br />
<br />
or via network. The BBB acts as DHCP server under the IP 192.168.1.1.<br />
<br />
* User root has password coreboot<br />
* ssh root@192.168.1.1<br />
<br />
== Basic usage ==<br />
<br />
There are two recommended ways to connect to the terminal of the screwdriver.<br />
<br />
First and always working: Use a USB to TTL (for example CP2104 for about 2$) adapter and connect it to the serial port of the BeagleBone Black.<br />
You have to use just 3 wires. Ground, TX and RX. Connect your ttl-adapter ground to serial pin 1 (the one with the white dot), RX to serial pin 4 and TX to serial pin 5.<br />
For the serial connection you can use for example <code>minicom -s</code>. In most cases on a linux machine the usb-ttl adapter gets: /dev/ttyUSB0 . The BeagleBone Black default serial speed is 115200.<br />
<br />
Second: Use a network cable and ssh. There is a dhcp server (192.168.1.1) running on the screwdriver.<br />
<br />
== Using screwdriver for flashing SPI flash with flashrom ==<br />
<br />
screwdriver already have flashrom preinstalled and the BeagleBone Black have connectors you can flash SPI flash memory with.<br />
<br />
You can flash SPI flash chips that are not 'in-circuit' without the need of additional power source. The light 3,3V rail the BeagleBone Black delivers can power the SPI chip if you power up the BeagleBone Black with at least 5V 1,2A power supply over its round power connector.<br />
<br />
This is a good article with pictures how to wire the BeagleBone Black to a SPI flash chip: https://www.linux.com/learn/tutorials/746860-how-to-access-chips-over-the-spi-on-beaglebone-black/<br />
<br />
Connectors:<br />
<br />
{| class="wikitable"<br />
!|BeagleBoneBlack||Pin on P9(written next to the big connector board)||SPI||SPI SOIC8 Pin||SOIC16||CPU||DTS<br />
|-<br />
|I2C1_SCL||17||CS||1||7||A16||spi0_cs0<br />
|-<br />
|I2C1_SDA||18||MOSI||5||15||B16||spi0_d1<br />
|-<br />
|UART2_RXD||22||CLK||6||16||A17||spi0_sclk<br />
|-<br />
|UART2_TXD||21||MISO||2||8||B17||spi0_d0<br />
|-<br />
|GND||1 + 2||GND||4||10||GND||GND<br />
|-<br />
|VDD_3V3D||3 + 4||VCC||8||2||VDD_3V3D||VDD_3V3D<br />
|-<br />
|}<br />
<br />
After wiring everything up you can flash with this command:<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0 -w yourfile</code> If you get the warning in flashrom that the flash chip is unsupported, you can force the flash with additional '-f' command and if everything worked fine, please directly report a logfile of the flash to the flashrom developers.<br />
<br />
<br />
<br />
== Using screwdriver as USB EHCI debugging tool ==<br />
<br />
The BeagleBone Black have a great free(as in freedom) and flexible architecture we can use for USB EHCI debugging. It have to be powered by external power supply over the round power connector.<br />
You need: mini-usb cable<br />
Connect the mini-usb cable to the EHCI debug port of your device you want to debug coreboot/libreboot on. If you are not sure what usb port is using ehci debug, you can just try all of them out.<br />
<br />
To run USB EHCI debugging you have to run:<br />
<code>screen /dev/ttyGS0</code><br />
<code>cat /dev/ttyGS0 | tee -a /tmp/output</code><br />
<br />
Then power on the target you want to debug and you would hopefully see the debug output.<br />
<br />
== Using screwdriver for flashing SPI flash with flashrom - IN-CIRCUIT ==<br />
<br />
=== Prerequisites ===<br />
We can flash an SPI flash chip in-circuit, providing we have an external power source.<br />
We will need<br />
* Power source for BeagleBone Black: USB (connected to computer or standard wall supply) or 5V barrel connector<br />
* Power source for SPI Flash chip, 3.3V. Ideally, we should use a lab Power Supply Unit as it is possible to vary the voltage easily and be sure we are getting the required voltage. It may not be possible to power the flash chip from the BeagleBone Black's 3.3V pin as it is too unreliable. Some guides also recommend an ATX PSU, but this may not be reliable, and at any rate it is good practice to check if the PSU is actually outputting 3.3V!<br />
* Ideally, a clip over the SPI chip, such as those sold by Pomona: http://uk.farnell.com/pomona/5252/test-clip-16-pos-1-27mm-soj-soic/dp/2406245. This clip is for SOIC-16 chips with 16 pins but other sizes are available e.g. for SOIC-8 chips. You should check what size your flash chip is by opening up the computer and identifying the chip. We can also solder the wires carefully, but the clip makes it easy to troubleshoot wiring issues. Other similar clips may work.<br />
* We should obtain wires. If we solder the flash chip the size doesn't matter, but we should use jumper cables for the SPI clip, with 2.54mm / 0.1" headers. Make sure to cut the wires as short as possible, less than 10cm, as interference may result in Flashrom not detecting the chip properly, or not at all.<br />
<br />
=== Wiring the flash chip to the BeagleBone Black and power supply ===<br />
<br />
Do not directly rest the BeagleBone Black on the computer motherboard which you are flashing, otherwise static electricity could damage components on the motherboard during flashing. <br />
<br />
These numbers correspond to pins on the BeagleBone:<br />
NC - - 21<br />
1 - - 17<br />
NC - - NC<br />
NC - - NC<br />
NC - - NC<br />
NC - - NC<br />
18 - - 3.3V (PSU)<br />
22 - - NC - pin 1 on flash chip<br />
<br />
Consult the BeagleBone documentation if you are unsure how the pins on the BeagleBone are numbered.<br />
Remember to connect pin 2 of the BeagleBone to the ground of the power supply.<br />
<br />
=== Testing connection ===<br />
<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128</code><br />
<br />
* Note that the SPI speed can be higher, if you want faster speeds. However, faster speeds are less stable. From experience, Flashrom sometimes doesn't detect the chip if there is too much interference, so a slower speed may be ideal. It may be possible to achieve over 512Hz as the SPI speed.<br />
* If Flashrom isn't sure what type of SPI chip you have after it detects the chip, you will need to open up the computer and look at what variation is printed on the chip. You will probably need a magnifying glass or microscope for this and some bright light. If you can't work it out, look on the internet and see what SPI chips your computer typically was manufactured with. You then specify with the -c option when you are using Flashrom to read or write the flash.<br />
<br />
=== Dump factory ROM image ===<br />
<br />
We should dump the factory ROM image in case the flashing process goes wrong somehow or the computer does not boot.<br />
<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128 -r factory.rom</code><br />
<br />
Now we verify the dumped image: <br />
<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128 --verify factory.rom</code><br />
<br />
You might want to do this multiple times too just to be sure that the dumped image was read correctly.<br />
<br />
=== Write your compiled image ===<br />
<br />
You will now send your compiled Coreboot ROM (or whatever ROM you're flashing to the SPI chip) to the BeagleBone, such as through scp. If you have connected through SSH this is easy.<br />
Assuming the ROM is called "rom.rom", run <br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128 -w rom.rom -V</code> <br />
<br />
This may take a long time, especially at 128Hz. Experiment with higher SPI speeds to see how fast you can use Flashrom while achieving stability. For an 8k SPI chip it may take around 30 minutes at SPI speed of 128Hz.<br />
<br />
=== Further notes ===<br />
<br />
Some of this was copied from the Libreboot page on programming SPI chips with the BeagleBone Black: https://libreboot.org/docs/install/bbb_setup.html. This is a good resource, and it has further notes about achieving stability during flashing. There are also more images to illustrate setup.<br />
<br />
== older/outdated screwdriver versions ==<br />
<br />
Version 0.2: http://repo.fe80.eu/screwdriver/0.2/omap/generic/openwrt-0.2-omap-beagleboneblack-sdcard-vfat-am335x_evm.img<br />
sha512sum: 26fc145b4b43b2589d500429c3bba379612870a63c2c03388cd663345a7c3a0792efc97cf3546c1e53b5d7eb958d43b9d21a9d6d0e4f13dd03f29878ef8dc753<br />
<br />
== references ==<br />
<br />
The official screwdriver development repository: https://github.com/lynxis/bbb_screwdriver_builder<br />
<br />
1. how to wire spi chip: http://www.linux.com/learn/tutorials/746860-how-to-access-chips-over-the-spi-on-beaglebone-black/<br />
<br />
2. Beagle bone black shematics: https://raw.githubusercontent.com/CircuitCo/BeagleBone-Black/master/BBB_SRM.pdf<br />
<br />
3. BeagleBone CPU datasheet: http://www.ti.com/lit/ds/symlink/am3358.pdf<br />
<br />
4. am335x CPU technical reference: http://www.ti.com/lit/ug/spruh73l/spruh73l.pdf</div>Dguthttps://www.coreboot.org/index.php?title=BeagleBone_Black_-_screwdriver&diff=20919BeagleBone Black - screwdriver2016-09-10T22:05:25Z<p>Dgut: /* Write your compiled image */</p>
<hr />
<div>A tool for coreboot/libreboot/flashrom developers and users. The firmware itself is based on vanilla OpenWrt Chaos Calmer(15.04) with some modifications. This firmware is mainly intended for BeagleBone Black (BBB).<br />
<br />
<br />
== Installing screwdriver ==<br />
<br />
To install screwdriver on the BeagleBone Black you have to create a bootable memory with the screwdriver.<br />
In this example we use a Micro-SD card. The card should be at least 128MB big.<br />
<br />
<br />
1. Download recent screwdriver Version 0.3.0 from <br />
http://repo.fe80.eu/screwdriver/0.3.0/omap/generic/default/openwrt-0.3.0-omap-beagleboneblack-sdcard-vfat-am335x_evm.img<br />
(sha512sum: 685f72aaa14342c848f15c933ea4f80deb33cd3751457e3e19e3b101659d2b96bae7f7be33b542cfdc4750cdd27e7e47ce35ffba15a5c2e76f8c41e7aad05f69 )<br />
<br />
2. Insert the memory you want to install screwdriver on into your computer.<br />
<br />
Linux users can check the latest messages in <code>dmesg</code> and if the memory is listed as /dev/sdb this have to be used together with 'dd' for installation from inside the directory containing the downloaded .img file:<br />
<code>sudo dd if=openwrt-0.3.0-omap-beagleboneblack-sdcard-vfat-am335x_evm.img of=/dev/sdb bs=4M</code><br />
<br />
Windows users have to use additional software like 'Win32 Disk Imager' from here: https://sourceforge.net/projects/win32diskimager/<br />
<br />
3. Now you can insert the memory into your BeagleBone Black.<br />
<br />
<br />
== Starting screwdriver ==<br />
<br />
In most cases screwdriver would boot automaticly when the memory is inserted and then the power(external 5V power plug).<br />
<br />
Troubleshooting if it does not start automaticly:<br />
You can choose between tree solutions.<br />
<br />
First and always working solution: Delete/wipe the internal memory of the BeagleBone black. This would force the BeagleBone Black to always boot from the memory you inserted.<br />
<br />
Second solution: Pressing and holding every time the 'User Boot' button. This is the button next to the big, regular USB port.<br />
<br />
Third solution: Rewrite internal memory to a recent official debian+u-boot image. It boots then automaticly when you insert the screwdriver memory.<br />
<br />
<br />
== Basic usage ==<br />
<br />
There are two recommended ways to connect to the terminal of the screwdriver.<br />
<br />
First and always working: Use a USB to TTL (for example CP2104 for about 2$) adapter and connect it to the serial port of the BeagleBone Black.<br />
You have to use just 3 wires. Ground, TX and RX. Connect your ttl-adapter ground to serial pin 1 (the one with the white dot), RX to serial pin 4 and TX to serial pin 5.<br />
For the serial connection you can use for example <code>minicom -s</code>. In most cases on a linux machine the usb-ttl adapter gets: /dev/ttyUSB0 . The BeagleBone Black default serial speed is 115200.<br />
<br />
Second: Use a network cable and ssh. There is a dhcp server (192.168.1.1) running on the screwdriver.<br />
<br />
== Using screwdriver for flashing SPI flash with flashrom ==<br />
<br />
screwdriver already have flashrom preinstalled and the BeagleBone Black have connectors you can flash SPI flash memory with.<br />
<br />
You can flash SPI flash chips that are not 'in-circuit' without the need of additional power source. The light 3,3V rail the BeagleBone Black delivers can power the SPI chip if you power up the BeagleBone Black with at least 5V 1,2A power supply over its round power connector.<br />
<br />
This is a good article with pictures how to wire the BeagleBone Black to a SPI flash chip: https://www.linux.com/learn/tutorials/746860-how-to-access-chips-over-the-spi-on-beaglebone-black/<br />
<br />
Connectors:<br />
<br />
{| class="wikitable"<br />
!|BeagleBoneBlack||Pin on P9(written next to the big connector board)||SPI||SPI SOIC8 Pin||SOIC16||CPU||DTS<br />
|-<br />
|I2C1_SCL||17||CS||1||7||A16||spi0_cs0<br />
|-<br />
|I2C1_SDA||18||MOSI||5||15||B16||spi0_d1<br />
|-<br />
|UART2_RXD||22||CLK||6||16||A17||spi0_sclk<br />
|-<br />
|UART2_TXD||21||MISO||2||8||B17||spi0_d0<br />
|-<br />
|GND||1 + 2||GND||4||10||GND||GND<br />
|-<br />
|VDD_3V3D||3 + 4||VCC||8||2||VDD_3V3D||VDD_3V3D<br />
|-<br />
|}<br />
<br />
After wiring everything up you can flash with this command:<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0 -w yourfile</code> If you get the warning in flashrom that the flash chip is unsupported, you can force the flash with additional '-f' command and if everything worked fine, please directly report a logfile of the flash to the flashrom developers.<br />
<br />
<br />
<br />
== Using screwdriver as USB EHCI debugging tool ==<br />
<br />
The BeagleBone Black have a great free(as in freedom) and flexible architecture we can use for USB EHCI debugging. It have to be powered by external power supply over the round power connector.<br />
You need: mini-usb cable<br />
Connect the mini-usb cable to the EHCI debug port of your device you want to debug coreboot/libreboot on. If you are not sure what usb port is using ehci debug, you can just try all of them out.<br />
<br />
To run USB EHCI debugging you have to run:<br />
<code>screen /dev/ttyGS0</code><br />
<code>cat /dev/ttyGS0 | tee -a /tmp/output</code><br />
<br />
Then power on the target you want to debug and you would hopefully see the debug output.<br />
<br />
== Using screwdriver for flashing SPI flash with flashrom - IN-CIRCUIT ==<br />
<br />
=== Prerequisites ===<br />
We can flash an SPI flash chip in-circuit, providing we have an external power source.<br />
We will need<br />
* Power source for BeagleBone Black: USB (connected to computer or standard wall supply) or 5V barrel connector<br />
* Power source for SPI Flash chip, 3.3V. Ideally, we should use a lab Power Supply Unit as it is possible to vary the voltage easily and be sure we are getting the required voltage. It may not be possible to power the flash chip from the BeagleBone Black's 3.3V pin as it is too unreliable. Some guides also recommend an ATX PSU, but this may not be reliable, and at any rate it is good practice to check if the PSU is actually outputting 3.3V!<br />
* Ideally, a clip over the SPI chip, such as those sold by Pomona: http://uk.farnell.com/pomona/5252/test-clip-16-pos-1-27mm-soj-soic/dp/2406245. This clip is for SOIC-16 chips with 16 pins but other sizes are available e.g. for SOIC-8 chips. You should check what size your flash chip is by opening up the computer and identifying the chip. We can also solder the wires carefully, but the clip makes it easy to troubleshoot wiring issues. Other similar clips may work.<br />
* We should obtain wires. If we solder the flash chip the size doesn't matter, but we should use jumper cables for the SPI clip, with 2.54mm / 0.1" headers. Make sure to cut the wires as short as possible, less than 10cm, as interference may result in Flashrom not detecting the chip properly, or not at all.<br />
<br />
=== Wiring the flash chip to the BeagleBone Black and power supply ===<br />
<br />
Do not directly rest the BeagleBone Black on the computer motherboard which you are flashing, otherwise static electricity could damage components on the motherboard during flashing. <br />
<br />
These numbers correspond to pins on the BeagleBone:<br />
NC - - 21<br />
1 - - 17<br />
NC - - NC<br />
NC - - NC<br />
NC - - NC<br />
NC - - NC<br />
18 - - 3.3V (PSU)<br />
22 - - NC - pin 1 on flash chip<br />
<br />
Consult the BeagleBone documentation if you are unsure how the pins on the BeagleBone are numbered.<br />
Remember to connect pin 2 of the BeagleBone to the ground of the power supply.<br />
<br />
=== Testing connection ===<br />
<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128</code><br />
<br />
* Note that the SPI speed can be higher, if you want faster speeds. However, faster speeds are less stable. From experience, Flashrom sometimes doesn't detect the chip if there is too much interference, so a slower speed may be ideal. It may be possible to achieve over 512Hz as the SPI speed.<br />
* If Flashrom isn't sure what type of SPI chip you have after it detects the chip, you will need to open up the computer and look at what variation is printed on the chip. You will probably need a magnifying glass or microscope for this and some bright light. If you can't work it out, look on the internet and see what SPI chips your computer typically was manufactured with. You then specify with the -c option when you are using Flashrom to read or write the flash.<br />
<br />
=== Dump factory ROM image ===<br />
<br />
We should dump the factory ROM image in case the flashing process goes wrong somehow or the computer does not boot.<br />
<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128 -r factory.rom</code><br />
<br />
Now we verify the dumped image: <br />
<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128 --verify factory.rom</code><br />
<br />
You might want to do this multiple times too just to be sure that the dumped image was read correctly.<br />
<br />
=== Write your compiled image ===<br />
<br />
You will now send your compiled Coreboot ROM (or whatever ROM you're flashing to the SPI chip) to the BeagleBone, such as through scp. If you have connected through SSH this is easy.<br />
Assuming the ROM is called "rom.rom", run <br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128 -w rom.rom -V</code> <br />
<br />
This may take a long time, especially at 128Hz. Experiment with higher SPI speeds to see how fast you can use Flashrom while achieving stability. For an 8k SPI chip it may take around 30 minutes at SPI speed of 128Hz.<br />
<br />
=== Further notes ===<br />
<br />
Some of this was copied from the Libreboot page on programming SPI chips with the BeagleBone Black: https://libreboot.org/docs/install/bbb_setup.html. This is a good resource, and it has further notes about achieving stability during flashing. There are also more images to illustrate setup.<br />
<br />
== older/outdated screwdriver versions ==<br />
<br />
Version 0.2: http://repo.fe80.eu/screwdriver/0.2/omap/generic/openwrt-0.2-omap-beagleboneblack-sdcard-vfat-am335x_evm.img<br />
sha512sum: 26fc145b4b43b2589d500429c3bba379612870a63c2c03388cd663345a7c3a0792efc97cf3546c1e53b5d7eb958d43b9d21a9d6d0e4f13dd03f29878ef8dc753<br />
<br />
== references ==<br />
<br />
The official screwdriver development repository: https://github.com/lynxis/bbb_screwdriver_builder<br />
<br />
1. how to wire spi chip: http://www.linux.com/learn/tutorials/746860-how-to-access-chips-over-the-spi-on-beaglebone-black/<br />
<br />
2. Beagle bone black shematics: https://raw.githubusercontent.com/CircuitCo/BeagleBone-Black/master/BBB_SRM.pdf<br />
<br />
3. BeagleBone CPU datasheet: http://www.ti.com/lit/ds/symlink/am3358.pdf<br />
<br />
4. am335x CPU technical reference: http://www.ti.com/lit/ug/spruh73l/spruh73l.pdf</div>Dguthttps://www.coreboot.org/index.php?title=BeagleBone_Black_-_screwdriver&diff=20918BeagleBone Black - screwdriver2016-09-10T22:04:19Z<p>Dgut: /* Prerequisites */</p>
<hr />
<div>A tool for coreboot/libreboot/flashrom developers and users. The firmware itself is based on vanilla OpenWrt Chaos Calmer(15.04) with some modifications. This firmware is mainly intended for BeagleBone Black (BBB).<br />
<br />
<br />
== Installing screwdriver ==<br />
<br />
To install screwdriver on the BeagleBone Black you have to create a bootable memory with the screwdriver.<br />
In this example we use a Micro-SD card. The card should be at least 128MB big.<br />
<br />
<br />
1. Download recent screwdriver Version 0.3.0 from <br />
http://repo.fe80.eu/screwdriver/0.3.0/omap/generic/default/openwrt-0.3.0-omap-beagleboneblack-sdcard-vfat-am335x_evm.img<br />
(sha512sum: 685f72aaa14342c848f15c933ea4f80deb33cd3751457e3e19e3b101659d2b96bae7f7be33b542cfdc4750cdd27e7e47ce35ffba15a5c2e76f8c41e7aad05f69 )<br />
<br />
2. Insert the memory you want to install screwdriver on into your computer.<br />
<br />
Linux users can check the latest messages in <code>dmesg</code> and if the memory is listed as /dev/sdb this have to be used together with 'dd' for installation from inside the directory containing the downloaded .img file:<br />
<code>sudo dd if=openwrt-0.3.0-omap-beagleboneblack-sdcard-vfat-am335x_evm.img of=/dev/sdb bs=4M</code><br />
<br />
Windows users have to use additional software like 'Win32 Disk Imager' from here: https://sourceforge.net/projects/win32diskimager/<br />
<br />
3. Now you can insert the memory into your BeagleBone Black.<br />
<br />
<br />
== Starting screwdriver ==<br />
<br />
In most cases screwdriver would boot automaticly when the memory is inserted and then the power(external 5V power plug).<br />
<br />
Troubleshooting if it does not start automaticly:<br />
You can choose between tree solutions.<br />
<br />
First and always working solution: Delete/wipe the internal memory of the BeagleBone black. This would force the BeagleBone Black to always boot from the memory you inserted.<br />
<br />
Second solution: Pressing and holding every time the 'User Boot' button. This is the button next to the big, regular USB port.<br />
<br />
Third solution: Rewrite internal memory to a recent official debian+u-boot image. It boots then automaticly when you insert the screwdriver memory.<br />
<br />
<br />
== Basic usage ==<br />
<br />
There are two recommended ways to connect to the terminal of the screwdriver.<br />
<br />
First and always working: Use a USB to TTL (for example CP2104 for about 2$) adapter and connect it to the serial port of the BeagleBone Black.<br />
You have to use just 3 wires. Ground, TX and RX. Connect your ttl-adapter ground to serial pin 1 (the one with the white dot), RX to serial pin 4 and TX to serial pin 5.<br />
For the serial connection you can use for example <code>minicom -s</code>. In most cases on a linux machine the usb-ttl adapter gets: /dev/ttyUSB0 . The BeagleBone Black default serial speed is 115200.<br />
<br />
Second: Use a network cable and ssh. There is a dhcp server (192.168.1.1) running on the screwdriver.<br />
<br />
== Using screwdriver for flashing SPI flash with flashrom ==<br />
<br />
screwdriver already have flashrom preinstalled and the BeagleBone Black have connectors you can flash SPI flash memory with.<br />
<br />
You can flash SPI flash chips that are not 'in-circuit' without the need of additional power source. The light 3,3V rail the BeagleBone Black delivers can power the SPI chip if you power up the BeagleBone Black with at least 5V 1,2A power supply over its round power connector.<br />
<br />
This is a good article with pictures how to wire the BeagleBone Black to a SPI flash chip: https://www.linux.com/learn/tutorials/746860-how-to-access-chips-over-the-spi-on-beaglebone-black/<br />
<br />
Connectors:<br />
<br />
{| class="wikitable"<br />
!|BeagleBoneBlack||Pin on P9(written next to the big connector board)||SPI||SPI SOIC8 Pin||SOIC16||CPU||DTS<br />
|-<br />
|I2C1_SCL||17||CS||1||7||A16||spi0_cs0<br />
|-<br />
|I2C1_SDA||18||MOSI||5||15||B16||spi0_d1<br />
|-<br />
|UART2_RXD||22||CLK||6||16||A17||spi0_sclk<br />
|-<br />
|UART2_TXD||21||MISO||2||8||B17||spi0_d0<br />
|-<br />
|GND||1 + 2||GND||4||10||GND||GND<br />
|-<br />
|VDD_3V3D||3 + 4||VCC||8||2||VDD_3V3D||VDD_3V3D<br />
|-<br />
|}<br />
<br />
After wiring everything up you can flash with this command:<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0 -w yourfile</code> If you get the warning in flashrom that the flash chip is unsupported, you can force the flash with additional '-f' command and if everything worked fine, please directly report a logfile of the flash to the flashrom developers.<br />
<br />
<br />
<br />
== Using screwdriver as USB EHCI debugging tool ==<br />
<br />
The BeagleBone Black have a great free(as in freedom) and flexible architecture we can use for USB EHCI debugging. It have to be powered by external power supply over the round power connector.<br />
You need: mini-usb cable<br />
Connect the mini-usb cable to the EHCI debug port of your device you want to debug coreboot/libreboot on. If you are not sure what usb port is using ehci debug, you can just try all of them out.<br />
<br />
To run USB EHCI debugging you have to run:<br />
<code>screen /dev/ttyGS0</code><br />
<code>cat /dev/ttyGS0 | tee -a /tmp/output</code><br />
<br />
Then power on the target you want to debug and you would hopefully see the debug output.<br />
<br />
== Using screwdriver for flashing SPI flash with flashrom - IN-CIRCUIT ==<br />
<br />
=== Prerequisites ===<br />
We can flash an SPI flash chip in-circuit, providing we have an external power source.<br />
We will need<br />
* Power source for BeagleBone Black: USB (connected to computer or standard wall supply) or 5V barrel connector<br />
* Power source for SPI Flash chip, 3.3V. Ideally, we should use a lab Power Supply Unit as it is possible to vary the voltage easily and be sure we are getting the required voltage. It may not be possible to power the flash chip from the BeagleBone Black's 3.3V pin as it is too unreliable. Some guides also recommend an ATX PSU, but this may not be reliable, and at any rate it is good practice to check if the PSU is actually outputting 3.3V!<br />
* Ideally, a clip over the SPI chip, such as those sold by Pomona: http://uk.farnell.com/pomona/5252/test-clip-16-pos-1-27mm-soj-soic/dp/2406245. This clip is for SOIC-16 chips with 16 pins but other sizes are available e.g. for SOIC-8 chips. You should check what size your flash chip is by opening up the computer and identifying the chip. We can also solder the wires carefully, but the clip makes it easy to troubleshoot wiring issues. Other similar clips may work.<br />
* We should obtain wires. If we solder the flash chip the size doesn't matter, but we should use jumper cables for the SPI clip, with 2.54mm / 0.1" headers. Make sure to cut the wires as short as possible, less than 10cm, as interference may result in Flashrom not detecting the chip properly, or not at all.<br />
<br />
=== Wiring the flash chip to the BeagleBone Black and power supply ===<br />
<br />
Do not directly rest the BeagleBone Black on the computer motherboard which you are flashing, otherwise static electricity could damage components on the motherboard during flashing. <br />
<br />
These numbers correspond to pins on the BeagleBone:<br />
NC - - 21<br />
1 - - 17<br />
NC - - NC<br />
NC - - NC<br />
NC - - NC<br />
NC - - NC<br />
18 - - 3.3V (PSU)<br />
22 - - NC - pin 1 on flash chip<br />
<br />
Consult the BeagleBone documentation if you are unsure how the pins on the BeagleBone are numbered.<br />
Remember to connect pin 2 of the BeagleBone to the ground of the power supply.<br />
<br />
=== Testing connection ===<br />
<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128</code><br />
<br />
* Note that the SPI speed can be higher, if you want faster speeds. However, faster speeds are less stable. From experience, Flashrom sometimes doesn't detect the chip if there is too much interference, so a slower speed may be ideal. It may be possible to achieve over 512Hz as the SPI speed.<br />
* If Flashrom isn't sure what type of SPI chip you have after it detects the chip, you will need to open up the computer and look at what variation is printed on the chip. You will probably need a magnifying glass or microscope for this and some bright light. If you can't work it out, look on the internet and see what SPI chips your computer typically was manufactured with. You then specify with the -c option when you are using Flashrom to read or write the flash.<br />
<br />
=== Dump factory ROM image ===<br />
<br />
We should dump the factory ROM image in case the flashing process goes wrong somehow or the computer does not boot.<br />
<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128 -r factory.rom</code><br />
<br />
Now we verify the dumped image: <br />
<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128 --verify factory.rom</code><br />
<br />
You might want to do this multiple times too just to be sure that the dumped image was read correctly.<br />
<br />
=== Write your compiled image ===<br />
<br />
You will now send your compiled Coreboot ROM to the BeagleBone, such as through scp. If you have connected through SSH this is easy.<br />
Assuming the ROM is called "coreboot.rom", run <br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128 -w coreboot.rom -V</code> <br />
<br />
This may take a long time, especially at 128Hz. Experiment with higher SPI speeds to see how fast you can use Flashrom while achieving stability. For an 8k SPI chip it may take around 30 minutes at SPI speed of 128Hz.<br />
<br />
=== Further notes ===<br />
<br />
Some of this was copied from the Libreboot page on programming SPI chips with the BeagleBone Black: https://libreboot.org/docs/install/bbb_setup.html. This is a good resource, and it has further notes about achieving stability during flashing. There are also more images to illustrate setup.<br />
<br />
== older/outdated screwdriver versions ==<br />
<br />
Version 0.2: http://repo.fe80.eu/screwdriver/0.2/omap/generic/openwrt-0.2-omap-beagleboneblack-sdcard-vfat-am335x_evm.img<br />
sha512sum: 26fc145b4b43b2589d500429c3bba379612870a63c2c03388cd663345a7c3a0792efc97cf3546c1e53b5d7eb958d43b9d21a9d6d0e4f13dd03f29878ef8dc753<br />
<br />
== references ==<br />
<br />
The official screwdriver development repository: https://github.com/lynxis/bbb_screwdriver_builder<br />
<br />
1. how to wire spi chip: http://www.linux.com/learn/tutorials/746860-how-to-access-chips-over-the-spi-on-beaglebone-black/<br />
<br />
2. Beagle bone black shematics: https://raw.githubusercontent.com/CircuitCo/BeagleBone-Black/master/BBB_SRM.pdf<br />
<br />
3. BeagleBone CPU datasheet: http://www.ti.com/lit/ds/symlink/am3358.pdf<br />
<br />
4. am335x CPU technical reference: http://www.ti.com/lit/ug/spruh73l/spruh73l.pdf</div>Dguthttps://www.coreboot.org/index.php?title=BeagleBone_Black_-_screwdriver&diff=20917BeagleBone Black - screwdriver2016-09-10T21:57:38Z<p>Dgut: /* Wiring the flash chip to the BeagleBone Black */</p>
<hr />
<div>A tool for coreboot/libreboot/flashrom developers and users. The firmware itself is based on vanilla OpenWrt Chaos Calmer(15.04) with some modifications. This firmware is mainly intended for BeagleBone Black (BBB).<br />
<br />
<br />
== Installing screwdriver ==<br />
<br />
To install screwdriver on the BeagleBone Black you have to create a bootable memory with the screwdriver.<br />
In this example we use a Micro-SD card. The card should be at least 128MB big.<br />
<br />
<br />
1. Download recent screwdriver Version 0.3.0 from <br />
http://repo.fe80.eu/screwdriver/0.3.0/omap/generic/default/openwrt-0.3.0-omap-beagleboneblack-sdcard-vfat-am335x_evm.img<br />
(sha512sum: 685f72aaa14342c848f15c933ea4f80deb33cd3751457e3e19e3b101659d2b96bae7f7be33b542cfdc4750cdd27e7e47ce35ffba15a5c2e76f8c41e7aad05f69 )<br />
<br />
2. Insert the memory you want to install screwdriver on into your computer.<br />
<br />
Linux users can check the latest messages in <code>dmesg</code> and if the memory is listed as /dev/sdb this have to be used together with 'dd' for installation from inside the directory containing the downloaded .img file:<br />
<code>sudo dd if=openwrt-0.3.0-omap-beagleboneblack-sdcard-vfat-am335x_evm.img of=/dev/sdb bs=4M</code><br />
<br />
Windows users have to use additional software like 'Win32 Disk Imager' from here: https://sourceforge.net/projects/win32diskimager/<br />
<br />
3. Now you can insert the memory into your BeagleBone Black.<br />
<br />
<br />
== Starting screwdriver ==<br />
<br />
In most cases screwdriver would boot automaticly when the memory is inserted and then the power(external 5V power plug).<br />
<br />
Troubleshooting if it does not start automaticly:<br />
You can choose between tree solutions.<br />
<br />
First and always working solution: Delete/wipe the internal memory of the BeagleBone black. This would force the BeagleBone Black to always boot from the memory you inserted.<br />
<br />
Second solution: Pressing and holding every time the 'User Boot' button. This is the button next to the big, regular USB port.<br />
<br />
Third solution: Rewrite internal memory to a recent official debian+u-boot image. It boots then automaticly when you insert the screwdriver memory.<br />
<br />
<br />
== Basic usage ==<br />
<br />
There are two recommended ways to connect to the terminal of the screwdriver.<br />
<br />
First and always working: Use a USB to TTL (for example CP2104 for about 2$) adapter and connect it to the serial port of the BeagleBone Black.<br />
You have to use just 3 wires. Ground, TX and RX. Connect your ttl-adapter ground to serial pin 1 (the one with the white dot), RX to serial pin 4 and TX to serial pin 5.<br />
For the serial connection you can use for example <code>minicom -s</code>. In most cases on a linux machine the usb-ttl adapter gets: /dev/ttyUSB0 . The BeagleBone Black default serial speed is 115200.<br />
<br />
Second: Use a network cable and ssh. There is a dhcp server (192.168.1.1) running on the screwdriver.<br />
<br />
== Using screwdriver for flashing SPI flash with flashrom ==<br />
<br />
screwdriver already have flashrom preinstalled and the BeagleBone Black have connectors you can flash SPI flash memory with.<br />
<br />
You can flash SPI flash chips that are not 'in-circuit' without the need of additional power source. The light 3,3V rail the BeagleBone Black delivers can power the SPI chip if you power up the BeagleBone Black with at least 5V 1,2A power supply over its round power connector.<br />
<br />
This is a good article with pictures how to wire the BeagleBone Black to a SPI flash chip: https://www.linux.com/learn/tutorials/746860-how-to-access-chips-over-the-spi-on-beaglebone-black/<br />
<br />
Connectors:<br />
<br />
{| class="wikitable"<br />
!|BeagleBoneBlack||Pin on P9(written next to the big connector board)||SPI||SPI SOIC8 Pin||SOIC16||CPU||DTS<br />
|-<br />
|I2C1_SCL||17||CS||1||7||A16||spi0_cs0<br />
|-<br />
|I2C1_SDA||18||MOSI||5||15||B16||spi0_d1<br />
|-<br />
|UART2_RXD||22||CLK||6||16||A17||spi0_sclk<br />
|-<br />
|UART2_TXD||21||MISO||2||8||B17||spi0_d0<br />
|-<br />
|GND||1 + 2||GND||4||10||GND||GND<br />
|-<br />
|VDD_3V3D||3 + 4||VCC||8||2||VDD_3V3D||VDD_3V3D<br />
|-<br />
|}<br />
<br />
After wiring everything up you can flash with this command:<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0 -w yourfile</code> If you get the warning in flashrom that the flash chip is unsupported, you can force the flash with additional '-f' command and if everything worked fine, please directly report a logfile of the flash to the flashrom developers.<br />
<br />
<br />
<br />
== Using screwdriver as USB EHCI debugging tool ==<br />
<br />
The BeagleBone Black have a great free(as in freedom) and flexible architecture we can use for USB EHCI debugging. It have to be powered by external power supply over the round power connector.<br />
You need: mini-usb cable<br />
Connect the mini-usb cable to the EHCI debug port of your device you want to debug coreboot/libreboot on. If you are not sure what usb port is using ehci debug, you can just try all of them out.<br />
<br />
To run USB EHCI debugging you have to run:<br />
<code>screen /dev/ttyGS0</code><br />
<code>cat /dev/ttyGS0 | tee -a /tmp/output</code><br />
<br />
Then power on the target you want to debug and you would hopefully see the debug output.<br />
<br />
== Using screwdriver for flashing SPI flash with flashrom - IN-CIRCUIT ==<br />
<br />
=== Prerequisites ===<br />
We can flash an SPI flash chip in-circuit, providing we have an external power source.<br />
We will need<br />
* Power source for BeagleBone Black: USB (connected to computer or standard wall supply) or 5V barrel connector<br />
* Power source for SPI Flash chip, 3.3V. Ideally, we should use a lab Power Supply Unit as it is possible to vary the voltage easily and be sure we are getting the required voltage. It is not possible to power the flash chip from the BeagleBone Black's 3.3V pin as it is too unreliable. Some guides also recommend an ATX PSU, but this may not be reliable, and at any rate it is good practice to check if the PSU is actually outputting 3.3V!<br />
* Ideally, a clip over the SPI chip, such as those sold by Pomona: http://uk.farnell.com/pomona/5252/test-clip-16-pos-1-27mm-soj-soic/dp/2406245. This clip is for SOIC-16 chips with 16 pins but other sizes are available e.g. for SOIC-8 chips. You should check what size your flash chip is by opening up the computer and identifying the chip. We can also solder the wires carefully, but the clip makes it easy to troubleshoot wiring issues. Other similar clips may work.<br />
* We should obtain wires. If we solder the flash chip the size doesn't matter, but we should use jumper cables for the SPI clip, with 2.54mm / 0.1" headers. Make sure to cut the wires as short as possible, less than 10cm, as interference may result in Flashrom not detecting the chip properly, or not at all.<br />
<br />
=== Wiring the flash chip to the BeagleBone Black and power supply ===<br />
<br />
Do not directly rest the BeagleBone Black on the computer motherboard which you are flashing, otherwise static electricity could damage components on the motherboard during flashing. <br />
<br />
These numbers correspond to pins on the BeagleBone:<br />
NC - - 21<br />
1 - - 17<br />
NC - - NC<br />
NC - - NC<br />
NC - - NC<br />
NC - - NC<br />
18 - - 3.3V (PSU)<br />
22 - - NC - pin 1 on flash chip<br />
<br />
Consult the BeagleBone documentation if you are unsure how the pins on the BeagleBone are numbered.<br />
Remember to connect pin 2 of the BeagleBone to the ground of the power supply.<br />
<br />
=== Testing connection ===<br />
<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128</code><br />
<br />
* Note that the SPI speed can be higher, if you want faster speeds. However, faster speeds are less stable. From experience, Flashrom sometimes doesn't detect the chip if there is too much interference, so a slower speed may be ideal. It may be possible to achieve over 512Hz as the SPI speed.<br />
* If Flashrom isn't sure what type of SPI chip you have after it detects the chip, you will need to open up the computer and look at what variation is printed on the chip. You will probably need a magnifying glass or microscope for this and some bright light. If you can't work it out, look on the internet and see what SPI chips your computer typically was manufactured with. You then specify with the -c option when you are using Flashrom to read or write the flash.<br />
<br />
=== Dump factory ROM image ===<br />
<br />
We should dump the factory ROM image in case the flashing process goes wrong somehow or the computer does not boot.<br />
<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128 -r factory.rom</code><br />
<br />
Now we verify the dumped image: <br />
<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128 --verify factory.rom</code><br />
<br />
You might want to do this multiple times too just to be sure that the dumped image was read correctly.<br />
<br />
=== Write your compiled image ===<br />
<br />
You will now send your compiled Coreboot ROM to the BeagleBone, such as through scp. If you have connected through SSH this is easy.<br />
Assuming the ROM is called "coreboot.rom", run <br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128 -w coreboot.rom -V</code> <br />
<br />
This may take a long time, especially at 128Hz. Experiment with higher SPI speeds to see how fast you can use Flashrom while achieving stability. For an 8k SPI chip it may take around 30 minutes at SPI speed of 128Hz.<br />
<br />
=== Further notes ===<br />
<br />
Some of this was copied from the Libreboot page on programming SPI chips with the BeagleBone Black: https://libreboot.org/docs/install/bbb_setup.html. This is a good resource, and it has further notes about achieving stability during flashing. There are also more images to illustrate setup.<br />
<br />
== older/outdated screwdriver versions ==<br />
<br />
Version 0.2: http://repo.fe80.eu/screwdriver/0.2/omap/generic/openwrt-0.2-omap-beagleboneblack-sdcard-vfat-am335x_evm.img<br />
sha512sum: 26fc145b4b43b2589d500429c3bba379612870a63c2c03388cd663345a7c3a0792efc97cf3546c1e53b5d7eb958d43b9d21a9d6d0e4f13dd03f29878ef8dc753<br />
<br />
== references ==<br />
<br />
The official screwdriver development repository: https://github.com/lynxis/bbb_screwdriver_builder<br />
<br />
1. how to wire spi chip: http://www.linux.com/learn/tutorials/746860-how-to-access-chips-over-the-spi-on-beaglebone-black/<br />
<br />
2. Beagle bone black shematics: https://raw.githubusercontent.com/CircuitCo/BeagleBone-Black/master/BBB_SRM.pdf<br />
<br />
3. BeagleBone CPU datasheet: http://www.ti.com/lit/ds/symlink/am3358.pdf<br />
<br />
4. am335x CPU technical reference: http://www.ti.com/lit/ug/spruh73l/spruh73l.pdf</div>Dguthttps://www.coreboot.org/index.php?title=BeagleBone_Black_-_screwdriver&diff=20916BeagleBone Black - screwdriver2016-09-10T21:54:43Z<p>Dgut: /* Using screwdriver for flashing SPI flash with flashrom - IN-CIRCUIT */</p>
<hr />
<div>A tool for coreboot/libreboot/flashrom developers and users. The firmware itself is based on vanilla OpenWrt Chaos Calmer(15.04) with some modifications. This firmware is mainly intended for BeagleBone Black (BBB).<br />
<br />
<br />
== Installing screwdriver ==<br />
<br />
To install screwdriver on the BeagleBone Black you have to create a bootable memory with the screwdriver.<br />
In this example we use a Micro-SD card. The card should be at least 128MB big.<br />
<br />
<br />
1. Download recent screwdriver Version 0.3.0 from <br />
http://repo.fe80.eu/screwdriver/0.3.0/omap/generic/default/openwrt-0.3.0-omap-beagleboneblack-sdcard-vfat-am335x_evm.img<br />
(sha512sum: 685f72aaa14342c848f15c933ea4f80deb33cd3751457e3e19e3b101659d2b96bae7f7be33b542cfdc4750cdd27e7e47ce35ffba15a5c2e76f8c41e7aad05f69 )<br />
<br />
2. Insert the memory you want to install screwdriver on into your computer.<br />
<br />
Linux users can check the latest messages in <code>dmesg</code> and if the memory is listed as /dev/sdb this have to be used together with 'dd' for installation from inside the directory containing the downloaded .img file:<br />
<code>sudo dd if=openwrt-0.3.0-omap-beagleboneblack-sdcard-vfat-am335x_evm.img of=/dev/sdb bs=4M</code><br />
<br />
Windows users have to use additional software like 'Win32 Disk Imager' from here: https://sourceforge.net/projects/win32diskimager/<br />
<br />
3. Now you can insert the memory into your BeagleBone Black.<br />
<br />
<br />
== Starting screwdriver ==<br />
<br />
In most cases screwdriver would boot automaticly when the memory is inserted and then the power(external 5V power plug).<br />
<br />
Troubleshooting if it does not start automaticly:<br />
You can choose between tree solutions.<br />
<br />
First and always working solution: Delete/wipe the internal memory of the BeagleBone black. This would force the BeagleBone Black to always boot from the memory you inserted.<br />
<br />
Second solution: Pressing and holding every time the 'User Boot' button. This is the button next to the big, regular USB port.<br />
<br />
Third solution: Rewrite internal memory to a recent official debian+u-boot image. It boots then automaticly when you insert the screwdriver memory.<br />
<br />
<br />
== Basic usage ==<br />
<br />
There are two recommended ways to connect to the terminal of the screwdriver.<br />
<br />
First and always working: Use a USB to TTL (for example CP2104 for about 2$) adapter and connect it to the serial port of the BeagleBone Black.<br />
You have to use just 3 wires. Ground, TX and RX. Connect your ttl-adapter ground to serial pin 1 (the one with the white dot), RX to serial pin 4 and TX to serial pin 5.<br />
For the serial connection you can use for example <code>minicom -s</code>. In most cases on a linux machine the usb-ttl adapter gets: /dev/ttyUSB0 . The BeagleBone Black default serial speed is 115200.<br />
<br />
Second: Use a network cable and ssh. There is a dhcp server (192.168.1.1) running on the screwdriver.<br />
<br />
== Using screwdriver for flashing SPI flash with flashrom ==<br />
<br />
screwdriver already have flashrom preinstalled and the BeagleBone Black have connectors you can flash SPI flash memory with.<br />
<br />
You can flash SPI flash chips that are not 'in-circuit' without the need of additional power source. The light 3,3V rail the BeagleBone Black delivers can power the SPI chip if you power up the BeagleBone Black with at least 5V 1,2A power supply over its round power connector.<br />
<br />
This is a good article with pictures how to wire the BeagleBone Black to a SPI flash chip: https://www.linux.com/learn/tutorials/746860-how-to-access-chips-over-the-spi-on-beaglebone-black/<br />
<br />
Connectors:<br />
<br />
{| class="wikitable"<br />
!|BeagleBoneBlack||Pin on P9(written next to the big connector board)||SPI||SPI SOIC8 Pin||SOIC16||CPU||DTS<br />
|-<br />
|I2C1_SCL||17||CS||1||7||A16||spi0_cs0<br />
|-<br />
|I2C1_SDA||18||MOSI||5||15||B16||spi0_d1<br />
|-<br />
|UART2_RXD||22||CLK||6||16||A17||spi0_sclk<br />
|-<br />
|UART2_TXD||21||MISO||2||8||B17||spi0_d0<br />
|-<br />
|GND||1 + 2||GND||4||10||GND||GND<br />
|-<br />
|VDD_3V3D||3 + 4||VCC||8||2||VDD_3V3D||VDD_3V3D<br />
|-<br />
|}<br />
<br />
After wiring everything up you can flash with this command:<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0 -w yourfile</code> If you get the warning in flashrom that the flash chip is unsupported, you can force the flash with additional '-f' command and if everything worked fine, please directly report a logfile of the flash to the flashrom developers.<br />
<br />
<br />
<br />
== Using screwdriver as USB EHCI debugging tool ==<br />
<br />
The BeagleBone Black have a great free(as in freedom) and flexible architecture we can use for USB EHCI debugging. It have to be powered by external power supply over the round power connector.<br />
You need: mini-usb cable<br />
Connect the mini-usb cable to the EHCI debug port of your device you want to debug coreboot/libreboot on. If you are not sure what usb port is using ehci debug, you can just try all of them out.<br />
<br />
To run USB EHCI debugging you have to run:<br />
<code>screen /dev/ttyGS0</code><br />
<code>cat /dev/ttyGS0 | tee -a /tmp/output</code><br />
<br />
Then power on the target you want to debug and you would hopefully see the debug output.<br />
<br />
== Using screwdriver for flashing SPI flash with flashrom - IN-CIRCUIT ==<br />
<br />
=== Prerequisites ===<br />
We can flash an SPI flash chip in-circuit, providing we have an external power source.<br />
We will need<br />
* Power source for BeagleBone Black: USB (connected to computer or standard wall supply) or 5V barrel connector<br />
* Power source for SPI Flash chip, 3.3V. Ideally, we should use a lab Power Supply Unit as it is possible to vary the voltage easily and be sure we are getting the required voltage. It is not possible to power the flash chip from the BeagleBone Black's 3.3V pin as it is too unreliable. Some guides also recommend an ATX PSU, but this may not be reliable, and at any rate it is good practice to check if the PSU is actually outputting 3.3V!<br />
* Ideally, a clip over the SPI chip, such as those sold by Pomona: http://uk.farnell.com/pomona/5252/test-clip-16-pos-1-27mm-soj-soic/dp/2406245. This clip is for SOIC-16 chips with 16 pins but other sizes are available e.g. for SOIC-8 chips. You should check what size your flash chip is by opening up the computer and identifying the chip. We can also solder the wires carefully, but the clip makes it easy to troubleshoot wiring issues. Other similar clips may work.<br />
* We should obtain wires. If we solder the flash chip the size doesn't matter, but we should use jumper cables for the SPI clip, with 2.54mm / 0.1" headers. Make sure to cut the wires as short as possible, less than 10cm, as interference may result in Flashrom not detecting the chip properly, or not at all.<br />
<br />
=== Wiring the flash chip to the BeagleBone Black ===<br />
<br />
Do not directly rest the BeagleBone Black on the computer motherboard which you are flashing, otherwise static electricity could damage components on the motherboard during flashing. <br />
<br />
These numbers correspond to pins on the BeagleBone:<br />
NC - - 21<br />
1 - - 17<br />
NC - - NC<br />
NC - - NC<br />
NC - - NC<br />
NC - - NC<br />
18 - - 3.3V (PSU)<br />
22 - - NC - pin 1 on flash chip<br />
<br />
Consult the BeagleBone documentation if you are unsure how the pins on the BeagleBone are numbered.<br />
Remember to connect pin 2 of the BeagleBone to the ground of the power supply.<br />
<br />
=== Testing connection ===<br />
<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128</code><br />
<br />
* Note that the SPI speed can be higher, if you want faster speeds. However, faster speeds are less stable. From experience, Flashrom sometimes doesn't detect the chip if there is too much interference, so a slower speed may be ideal. It may be possible to achieve over 512Hz as the SPI speed.<br />
* If Flashrom isn't sure what type of SPI chip you have after it detects the chip, you will need to open up the computer and look at what variation is printed on the chip. You will probably need a magnifying glass or microscope for this and some bright light. If you can't work it out, look on the internet and see what SPI chips your computer typically was manufactured with. You then specify with the -c option when you are using Flashrom to read or write the flash.<br />
<br />
=== Dump factory ROM image ===<br />
<br />
We should dump the factory ROM image in case the flashing process goes wrong somehow or the computer does not boot.<br />
<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128 -r factory.rom</code><br />
<br />
Now we verify the dumped image: <br />
<br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128 --verify factory.rom</code><br />
<br />
You might want to do this multiple times too just to be sure that the dumped image was read correctly.<br />
<br />
=== Write your compiled image ===<br />
<br />
You will now send your compiled Coreboot ROM to the BeagleBone, such as through scp. If you have connected through SSH this is easy.<br />
Assuming the ROM is called "coreboot.rom", run <br />
<code>flashrom -p linux_spi:dev=/dev/spidev1.0,spispeed=128 -w coreboot.rom -V</code> <br />
<br />
This may take a long time, especially at 128Hz. Experiment with higher SPI speeds to see how fast you can use Flashrom while achieving stability. For an 8k SPI chip it may take around 30 minutes at SPI speed of 128Hz.<br />
<br />
=== Further notes ===<br />
<br />
Some of this was copied from the Libreboot page on programming SPI chips with the BeagleBone Black: https://libreboot.org/docs/install/bbb_setup.html. This is a good resource, and it has further notes about achieving stability during flashing. There are also more images to illustrate setup.<br />
<br />
== older/outdated screwdriver versions ==<br />
<br />
Version 0.2: http://repo.fe80.eu/screwdriver/0.2/omap/generic/openwrt-0.2-omap-beagleboneblack-sdcard-vfat-am335x_evm.img<br />
sha512sum: 26fc145b4b43b2589d500429c3bba379612870a63c2c03388cd663345a7c3a0792efc97cf3546c1e53b5d7eb958d43b9d21a9d6d0e4f13dd03f29878ef8dc753<br />
<br />
== references ==<br />
<br />
The official screwdriver development repository: https://github.com/lynxis/bbb_screwdriver_builder<br />
<br />
1. how to wire spi chip: http://www.linux.com/learn/tutorials/746860-how-to-access-chips-over-the-spi-on-beaglebone-black/<br />
<br />
2. Beagle bone black shematics: https://raw.githubusercontent.com/CircuitCo/BeagleBone-Black/master/BBB_SRM.pdf<br />
<br />
3. BeagleBone CPU datasheet: http://www.ti.com/lit/ds/symlink/am3358.pdf<br />
<br />
4. am335x CPU technical reference: http://www.ti.com/lit/ug/spruh73l/spruh73l.pdf</div>Dgut