Difference between revisions of "ACPI"

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m (More info about dynamic IRQs)
(New chapter about S3)
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==== FACS table ====
==== FACS table ====
This table must be aligned to 64B boundary (Windows check this).
This table must be aligned to 64B boundary (Windows check this).
=== Suspend to RAM ===
There are patches on ML which add support for suspend to RAM in coreboot. Checklist of things which needs to be setup correctly:
* Supend clocks, SUSA/B/C plane pins
* Often the SuperIO has some pin to toggle the power for RAM
* SLP_TYPE with S3 definition to your DSDT
* support for exit-self-refresh in your RAM controller
* an NVRAM which store the memory configuration, which is known runtime (DQS)
* Chipset tweaks for S3 (like various signal delays)
* CPU tweaks (for AMD the PM1 and PM2 registers and SMAF codes)


=== Debugging ACPI ===
=== Debugging ACPI ===

Revision as of 20:22, 12 April 2009