Difference between revisions of "ACPI"
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(ACPI bytecode generator) |
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Checklist of things which needs to be setup correctly: | Checklist of things which needs to be setup correctly: | ||
* Supend clocks, SUSA/B/C plane pins | |||
* Often the SuperIO has some pin to toggle the power for RAM | |||
* SLP_TYPE with S3 definition to your DSDT | |||
* support for exit-self-refresh in your RAM controller | |||
* an NVRAM which store the memory configuration, which is known runtime (DQS) | |||
* Chipset tweaks for S3 (like various signal delays) | |||
* CPU tweaks (for AMD the PM1 and PM2 registers and SMAF codes) | |||
* _RAMBASE of coreboot setup to 31MB and set LB_MEM_TOPK to 32MB | |||
* make sure new code does not corrupt any memory | |||
* make sure that you reserve _RAMBASE - LB_MEM_TOPK | |||
* SMP might need some fixes | |||
=== ACPI bytecode generator === | === ACPI bytecode generator === |