This HOWTO explains how to use coreboot on the ASUS A8N-E board.
|CPU works||OK||Tested: AMD Athlon(tm) 64 Processor 3000+.|
|L1 cache enabled||OK||CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line)|
|L2 cache enabled||OK||CPU: L2 Cache: 512K (64 bytes/line)|
|L3 cache enabled||N/A|
|Multiple CPU support||N/A|
|DDR||OK||Tested with one DIMM in slot DIMM_B1 (see manual).|
|Dual channel support||Untested|
|ECC support||Untested||The board supports ECC according to the manual.|
|On-board IDE 3.5"||OK||Tested: Primary IDE (master and slave) and secondary IDE (master and slave).|
|On-board IDE 2.5"||N/A|
|On-board SATA||WIP||Port 3 (hde in FILO) and 4 (hdg in FILO) on the board work fine. Port 1 and 2 don't seem to work, this is being investigated.|
|On-board USB||OK||Tested: USB keyboard (on each of the 10 possible USB ports).|
|On-board Smartcard reader||N/A|
|On-board SD card reader||N/A|
|ISA add-on cards||N/A|
|Audio/Modem-Riser (AMR/CNR) cards||N/A|
|PCI add-on cards||OK||Tested: PCI VGA card in all three PCI slots.|
|Mini-PCI add-on cards||Unknown|
|PCI-X add-on cards||Unknown|
|AGP graphics cards||N/A|
|PCI Express x1 add-on cards||Untested|
|PCI Express x2 add-on cards||N/A|
|PCI Express x4 add-on cards||Untested|
|PCI Express x8 add-on cards||N/A|
|PCI Express x16 add-on cards||Untested|
|PCI Express x32 add-on cards||N/A|
|HTX add-on cards||N/A|
|Legacy / Super I/O|
|Serial port 1 (COM1)||OK|
|Serial port 2 (COM2)||N/A|
|Parallel port||OK||Tested: modprobe ppdev, further tests were not performed.|
|PS/2 keyboard||OK||use Rev. >=3610|
|PS/2 mouse||WIP||Doesn't seem to work yet, this is being investigated.|
|Sensors / fan control||OK||Tested: sensors reports K8 core temp. (kernel module k8temp) and various other values from the IT8712F Super I/O (kernel module it87).|
|CPU frequency scaling||No||Needs (at least partial) ACPI support.|
|Other powersaving features||N/A|
|ACPI||No||There's no ACPI implementation for this board.|
|Nonstandard LEDs||OK||There's a green LED on the board which is enabled when the board is powered-on. Works out of the box, no special coreboot support required.|
|High precision event timers (HPET)||OK||The hardware supports it, but you currently need the hpet=force Linux kernel parameter. Reduces the number of wakeups in powertop drastically.|
|Random number generator (RNG)||N/A|
|Wake on modem ring||Untested|
|Wake on LAN||N/A||The on-board ethernet device doesn't seem to support WOL (also not mentioned in the manual).|
|Wake on keyboard||Untested|
|Wake on mouse||Untested|
|Flashrom||OK||Works fine when booted with BIOS and also with coreboot.|
Before you begin
The ASUS A8N-SLI Deluxe, an "nforce 4 sli" board probably shares the same PCB design with more solder pads populated (please confirm), and is also out of stock mostly.
The ASUS A8NE-FM/S has initial support in the form of a patch.
Hot plugging a BIOS chip was successfully done (pull out chip with glued-on handle while running Linux), so you don't necessarily need an external EPROM programmer, just a spare working 49LF004 chip. 8 MBit SST 49LF080A was also successfully flashed and booted with legacy BIOS (two images concatenated). The PLCC32 BIOS chip is of type SST 49LF004B of which you need a spare programmed piece. You might reflash an empty or used one plugged into your A8N.
Enable Serial Console for debugging. It will come up at 115200,8n1 option SERIAL_CONSOLE The revisions 3000 and up work, but don't expect anything to see on the POST card. The serial Terminal will show whether LB manages with your RAM.
run targets/buildtarget then run make in the A8N-E directory. you get a 512KB image. abuild may come up with a 508KB image, which is not working.
in bash you may type svn co svn://coreboot.org/buildrom then type "make menuconfig" but the A8NE is not supported there yet.
- this tutorial is not as complete as the one for Gigabyte M57-SLI, so please look there for info on building the image.
- Currently PS/2 keyboards do not work, but USB keyboards do. --> this was fixed with Rev.3610
- Single DIMM support only : the blue DIMM_B1 socket should be populated only.
- The MAC address is stored in flash for almost all CK804/MCP55 boards. All of these boards flashed with LB probably have the same MAC address. See src/southbridge/nvidia/ck804/romstrap.inc and src/southbridge/nvidia/mcp55/romstrap.inc for details. On some of these boards, the MAC address is stored in a separate EEPROM, but you can't count on that.
If you can help out with this, please join the mailing list and let us know!
|This work is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or any later version. This work is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.|