Board:apple/macbook21

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The wiki is being retired!

Documentation is now handled by the same processes we use for code: Add something to the Documentation/ directory in the coreboot repo, and it will be rendered to https://doc.coreboot.org/. Contributions welcome!

Hardware

Status

Tested on MacBook2,1 (Mid 2007) 2.0 GHz Core 2 Duo, Model No: A1181 (EMC 2139). The tested machine is as described here: [1] with the one difference that the vendor's EFI architecture in fact is 32-Bit. Might work as well, but not tested on MacBook2,1 (Late 2006) and MacBook1,1 possibly with small code modifications. Issues:

  • OS X and Windows dont work yet.
  • More Issues

Tested:

  • Works with GNU/Linux and GNU/Linux-libre

Not tested:

Proprietary components

Code

Not yet merged into master. It's under review and will be improved. See

Flashing

Flashing is easy with the vendor BIOS version MB21.00A5.B07 (EFI 1.1) installed. Maybe see also this page for a more recent verion: EFI and SMC firmware updates for Intel-based Macs.

Identify the flash chip

Make sure flashrom can identify the flash chip:

# flashrom --verbose --programmer internal:laptop=force_I_want_a_brick >flashrom_info.log

The output should involve:

...
DMI string system-manufacturer: "Apple Inc."
DMI string system-product-name: "MacBook2,1"
DMI string system-version: "1.0"
DMI string baseboard-manufacturer: "Apple Inc."
DMI string baseboard-product-name: "Mac-F4208CAA"
DMI string baseboard-version: "PVT"
DMI string chassis-type: "Notebook"
Laptop detected via DMI.
Found chipset "Intel ICH7M" with PCI ID 8086:27b9. Enabling flash write... 
...
Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xbf, id2 0x2541
Found SST flash chip "SST25VF016B" (2048 kB, SPI) at physical address 0xffe00000.
Chip status register is 0x1c.
Chip status register: Block Protect Write Disable (BPL) is not set
Chip status register: Auto Address Increment Programming (AAI) is not set
Chip status register: Block Protect 3 (BP3) is not set
Chip status register: Block Protect 2 (BP2) is set
Chip status register: Block Protect 1 (BP1) is set
Chip status register: Block Protect 0 (BP0) is set
Chip status register: Write Enable Latch (WEL) is not set
Chip status register: Write In Progress (WIP/BUSY) is not set
Resulting block protection : all
...
Found SST flash chip "SST25VF016B" (2048 kB, SPI).
No operations were specified.
...

If it does not find this very same chip but rather finds a different chip or none at all: stop here and think twice.

Read the vendor BIOS

Read the vendor BIOS and store it in a safe place (possibly at two different places outside the MacBook).

# flashrom --verbose --programmer internal:laptop=force_I_want_a_brick --chip SST25VF016B \
  --read rom.bin >flashrom_read.log 2>&1

The output should involve:

...
Found SST flash chip "SST25VF016B" (2048 kB, SPI) at physical address 0xffe00000.
...
Resulting block protection : none
Reading flash... done.
...

Write coreboot

# flashrom --verbose --programmer internal:laptop=force_I_want_a_brick --chip SST25VF016B \
  --write coreboot.rom >flashrom_write.log 2>&1

The output should involve:

...
Found SST flash chip "SST25VF016B" (2048 kB, SPI) at physical address 0xffe00000.
...
Resulting block protection : none
coreboot last image size (not ROM size) is 2097152 bytes.
Manufacturer: Apple
Mainboard ID: MacBook2,1
Reading old flash chip contents... done.
Erasing and writing flash chip... Trying erase function 0... 0x000000-0x000fff:ETransaction error!
Running OPCODE 0x20 failed at address 0x000000 (payload length was 0).
spi_block_erase_20 failed during command execution at address 0x0
Reading current flash chip contents... done. Looking for another erase function.
Trying erase function 1... 0x000000-0x007fff:ETransaction error!
Running OPCODE 0x52 failed at address 0x000000 (payload length was 0).
spi_block_erase_52 failed during command execution at address 0x0
Reading current flash chip contents... done. Looking for another erase function.
Trying erase function 2... 0x000000-0x00ffff:ETransaction error!
Running OPCODE 0xd8 failed at address 0x000000 (payload length was 0).
spi_block_erase_d8 failed during command execution at address 0x0
Reading current flash chip contents... done. Looking for another erase function.
Trying erase function 3... 0x000000-0x1fffff:EW
Erase/write done.
Verifying flash... VERIFIED.
...

Update coreboot

Once coreboot is installed, flashing an update coreboot version or reverting back to the vendor BIOS works with and without the laptop=force_I_want_a_brick switch.