Difference between revisions of "Board:asus/a8n e"

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This HOWTO explains how to use coreboot on the '''[http://www.asus.com.tw/products.aspx?l1=3&l2=15&l3=171&l4=0&model=455&modelmenu=2 ASUS A8N-E]''' board.
 
This HOWTO explains how to use coreboot on the '''[http://www.asus.com.tw/products.aspx?l1=3&l2=15&l3=171&l4=0&model=455&modelmenu=2 ASUS A8N-E]''' board.
  
−
[http://www.linuxbios.org/pipermail/linuxbios/2007-May/021280.html Works fine], only smaller issues remain to be fixed. A [http://www.linuxbios.org/pipermail/linuxbios/2007-May/021308.html list of known issues] is available.
+
Works fine, only smaller issues remain to be fixed. A list of known issues is available at the end of this page.
  
 
== Status ==
 
== Status ==
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|RAM_DDR2_status = N/A
 
|RAM_DDR2_status = N/A
 
|RAM_DDR3_status = N/A
 
|RAM_DDR3_status = N/A
−
|RAM_dualchannel_status = Untested
+
|RAM_dualchannel_status = OK
 
|RAM_ecc_status = OK
 
|RAM_ecc_status = OK
  
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|LEDs_comments = There's a green LED on the board which is enabled when the board is powered-on. Works out of the box, no special coreboot support required.
 
|LEDs_comments = There's a green LED on the board which is enabled when the board is powered-on. Works out of the box, no special coreboot support required.
 
|HPET_status = OK
 
|HPET_status = OK
−
|HPET_comments = The hardware [http://lkml.org/lkml/2007/10/19/226 supports it], but you currently need the '''hpet=force''' Linux kernel parameter. Reduces the number of wakeups in powertop ''drastically''.
 
 
|RNG_status = N/A
 
|RNG_status = N/A
 
|WakeOnModem_status = Untested
 
|WakeOnModem_status = Untested
Line 111: Line 110:
  
 
* The MAC address is stored in flash for almost all CK804/MCP55 boards. All of these boards flashed with coreboot probably have the same MAC address. See '''src/southbridge/nvidia/ck804/romstrap.inc''' and '''src/southbridge/nvidia/mcp55/romstrap.inc''' for details. On some of these boards, the MAC address is stored in a separate EEPROM, but you can't count on that.
 
* The MAC address is stored in flash for almost all CK804/MCP55 boards. All of these boards flashed with coreboot probably have the same MAC address. See '''src/southbridge/nvidia/ck804/romstrap.inc''' and '''src/southbridge/nvidia/mcp55/romstrap.inc''' for details. On some of these boards, the MAC address is stored in a separate EEPROM, but you can't count on that.
 +
* No S3 (Suspend-to-RAM)
 +
* No ASPM
 +
* No frequency scaling
 +
* Power button doesn't generate ACPI event
  
 
If you can help out with this, please join the [[Mailinglist|mailing list]] and let us know!
 
If you can help out with this, please join the [[Mailinglist|mailing list]] and let us know!
  
 
{{GPL}}
 
{{GPL}}

Latest revision as of 17:28, 4 February 2014

ASUS A8N-E, rev. 2.00

This HOWTO explains how to use coreboot on the ASUS A8N-E board.

Works fine, only smaller issues remain to be fixed. A list of known issues is available at the end of this page.

Status

Device/functionality Status Comments
CPU
CPU works OK Tested: AMD Athlon(tm) 64 Processor 3000+ and 3200+.
L1 cache enabled OK CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line)
L2 cache enabled OK CPU: L2 Cache: 512K (64 bytes/line)
L3 cache enabled N/A
Multiple CPU support N/A
Multi-core support Untested
Hardware virtualization N/A
RAM
EDO N/A
SDRAM N/A
SO-DIMM N/A
DDR OK Tested with one DIMM in slot DIMM_B1 (see manual). Since r3614 it's also possible to use a single DIMM in slot DIMM_B2.
DDR2 N/A
DDR3 N/A
Dual channel support OK
ECC support OK
On-board Hardware
On-board IDE 3.5" OK Tested: Primary IDE (master and slave) and secondary IDE (master and slave).
On-board IDE 2.5" N/A
On-board SATA OK
On-board SCSI N/A
On-board USB OK Tested: USB keyboard (on each of the 10 possible USB ports).
On-board VGA N/A
On-board Ethernet OK
On-board Audio OK
On-board Modem N/A
On-board FireWire N/A
On-board Smartcard reader N/A
On-board CompactFlash N/A
On-board PCMCIA N/A
On-board Wifi N/A
On-board Bluetooth N/A
On-board SD card reader N/A
Add-on slots/cards
ISA add-on cards N/A
Audio/Modem-Riser (AMR/CNR) cards N/A
PCI add-on cards OK Tested: PCI VGA card in all three PCI slots.
Mini-PCI add-on cards N/A
Mini-PCI-Express add-on cards Unknown
PCI-X add-on cards N/A
AGP graphics cards N/A
PCI Express x1 add-on cards Untested
PCI Express x2 add-on cards N/A
PCI Express x4 add-on cards Untested
PCI Express x8 add-on cards N/A
PCI Express x16 add-on cards Untested
PCI Express x32 add-on cards N/A
HTX add-on cards N/A
Legacy / Super I/O
Floppy OK
Serial port 1 (COM1) OK
Serial port 2 (COM2) N/A
Parallel port OK Tested with a printer
PS/2 keyboard OK
PS/2 mouse OK
Game port N/A
Infrared N/A
PC speaker OK
DiskOnChip N/A
Input
Trackpoint N/A
Touchpad N/A
Fn Hotkeys N/A
Fingerprint Reader N/A
Laptop
Docking VGA N/A
Docking LAN N/A
Docking USB N/A
Docking Audio N/A
Docking Displayport N/A
Thinklight N/A
Webcam N/A
Miscellaneous
Sensors / fan control OK Tested: sensors reports K8 core temp. (kernel module k8temp) and various other values from the IT8712F Super I/O (kernel module it87).
Hardware watchdog N/A
SMBus OK
CAN bus N/A
CPU frequency scaling No
Other powersaving features N/A
ACPI OK
Reboot OK
Poweroff OK
Suspend No
Nonstandard LEDs OK There's a green LED on the board which is enabled when the board is powered-on. Works out of the box, no special coreboot support required.
High precision event timers (HPET) OK
Random number generator (RNG) N/A
Wake on modem ring Untested
Wake on LAN N/A The on-board ethernet device doesn't seem to support WOL (also not mentioned in the manual).
Wake on keyboard Untested
Wake on mouse Untested
TPM Unknown
Flashrom OK Works fine when booted with BIOS and also with coreboot.

Building coreboot

See the Build HOWTO for information on how to build coreboot for this board.

Known issues

  • The MAC address is stored in flash for almost all CK804/MCP55 boards. All of these boards flashed with coreboot probably have the same MAC address. See src/southbridge/nvidia/ck804/romstrap.inc and src/southbridge/nvidia/mcp55/romstrap.inc for details. On some of these boards, the MAC address is stored in a separate EEPROM, but you can't count on that.
  • No S3 (Suspend-to-RAM)
  • No ASPM
  • No frequency scaling
  • Power button doesn't generate ACPI event

If you can help out with this, please join the mailing list and let us know!

GNU head This work is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or any later version. This work is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
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