The wiki is being retired!
Documentation is now handled by the same processes we use for code: Add something to the Documentation/ directory in the coreboot repo, and it will be rendered to https://doc.coreboot.org/. Contributions welcome!
Before you begin
The plcc32 BIOS chip is of type SST 49LF004B of which you need a spare pre-programmed piece.
A8N-sli deluxe, an "nforce 4 sli" board probably shares the same pcb design with more solder pads populated (pls cnfirm), and is also out of stock mostly. Supporting more recent A8N boards is considered, but there is no confirmation about any one already finished
Hot plugging a BIOS chip was successfully done (pull out chip with glued-on handle while running Linux), so you don't necessarily need an external eprom programmer, just a spare working 49LF004.
8 MBit SST 49LF080A was also successfully flashed and booted with legacy BIOS (two images concatenated).
currently PS/2 keyboards do not work, but USB keyboards do.
single DIMM support only
The MAC address is stored in flash for almost all CK804/MCP55 boards. All of these boards flashed with LB probably have the same MAC address. See src/southbridge/nvidia/ck804/romstrap.inc and src/southbridge/nvidia/mcp55/romstrap.inc for details. On some of these boards, the MAC address is stored in a separate EEPROM, but you can't count on that.
Building the payload
Current status of the LBv2 tree
If you can help out with this, please join the mailing list and let us know!
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