The wiki is being retired!
Documentation is now handled by the same processes we use for code: Add something to the Documentation/ directory in the coreboot repo, and it will be rendered to https://doc.coreboot.org/. Contributions welcome!
"lowRISC is creating a fully open-sourced, Linux-capable, RISC-V-based SoC, that can be used either directly or as the basis for a custom design. We aim to complete our SoC design this year ."
This coreboot port runs on the lowRISC bitstream for the Nexys 4 DDR FPGA development board.
- make crossgcc-riscv
- select the board in menuconfig
- convert the board to an ELF file through util/riscvtools/make-spike-elf.sh
- Copy coreboot.elf on a µSD card as boot.bin
- Boot the FPGA board with this µSD card