Difference between revisions of "Board:nokia/ip530"
m (Created page with 'Marc Bertens')
(Coreboot success story for the Nokia IP530 hardware.)
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Revision as of 20:04, 3 June 2010
My work on coreboot started with the Nokia IP530. These older firewalls are basically PC's, having a PIII and i440BX chip set in 19 inch 2u high units. I got these machines from my employer, they moved on to a visualized environment. I wanted to make them into some nice servers to test various things and play around with Linux.
Hardware config of the Nokia IP530 - PIII - i440BX, 82371 chipset - 28F400 intel flash - SMSC 37B787 superio - two HDD bays, which can be accessed from the front - 4x NIC DECchip 21143 - dual PCMCIA slots - 3x compact PCI slots (industrial PCI slots)
Note: NO VGA only a serial console, and initial with 9K6-8n1
But when it started on then it seemed that they would not boot Linux, searching the web I found out that the orginal OS that was used by Nokia (IPSO) is FreeBSD based. Again I setup a new image on a harddisk but now with FreeBSD and yes it started... so I could get them to work, but the goal was to get linux on them. A lot of searching on the web, I ended up at coreboot and flashrom.
First, I started with Flashrom, to be able to flash the ROM. Reading was not a problem but writing was. i contacted the IRC #flashrom room and asked a lot of questions and got a lot of help. I saved the original BIOS image in a file to start with.
The guys of Flashrom made a first patch to support the flash chip it self (28F400B-T). And with this patch i tried to flash the ROM with its original image. But it failed on the erase. I told them what had happened and they said "there has to be "bios-write-enable" hardware line comming from somewhere. So with a multimeter I found out where the WE# line of the ROM went, to the superio chip.
Again talking to the guys of flashrom and they made a second patch for me. And when I tried to flash it it did the erase and the write of the flashrom.
So finally i was ready to start on coreboot. Talking to the guys of coreboot they told me that it was a good idea to have a fallback option in case of coreboot is not able to boot. And that is 99% change, even that the chipset is supported, it need some work for it ready works.
On the main board is a JDEBUG connector, and i started with a multimeter to find out which signals where on this connector. And basically it has all the signals of the ROM D0-7 and A0-17, VCC and GND. And there are three pads that didn't have a jumper in it, and I found out that this was the ROMCS# line to the ROM and JDEBUG connector. But two pads where shorted. After finding the short (a 0 Ohm resistor on the board). I soldered in a jumper removed the resistor. Now i could select with a jumper the orginal ROM or the JDEBUG connector. I make a little adaptor board with a connector a PLCC32 socket and a resistor that could be placed on the JDEBUG connector. And i flashed (with a external programmer) my first image in the flash chip that i ordered at my local hardware store.
It did start coreboot, but it crashed as well !!!!!!!
After a lot of fiddling i got coreboot to work, at first with only the serial port and HDD, later with just one NIC. and much later with even four NICs. And the latest is that all devices work, even the compact PCI slots.