Creating A devicetree.cb
The wiki is being retired!
Documentation is now handled by the same processes we use for code: Add something to the Documentation/ directory in the coreboot repo, and it will be rendered to https://doc.coreboot.org/. Contributions welcome!
This article should help people who are writting a devicetree.cb for their system.
What you will need
- lspci -nvvv output
The mainboard's devicetree.cb file contains many build and platform configuration settings. One of the most important items is the mainboard device list.
A device needs to be listed in the mainboard devicetree.cb if it requires more setup than standard PCI initialization (resource allocation). Typically, that includes the CPU, northbridge, southbridge, and Super I/O. These devices are usually required for system specific configuration as well as indicate the system bus structure (pci_domain).
When a device in devicetree.cb is found during the coreboot PCI/system scan process the functions to do customized initialization are called via the device_operations and the chip_operations structures. You will find these structures in the devices source files.
Keywords & Symbols
chip, device, register,on,off,pci,ioapic,pnp,i2c,lapic,cpu_cluster,domain,irq,drq,io,ioapic_irq,inherit,subsystemid,end,=
ioapic_irq: ioapic_irq number-literal pciint number-literal
rewrite this in BNF notation..
Literal values types are defined and thus consumed by the following regular expressions:
- PCI Interrupts
\"[^\"]+\" [^ \n\t]+
See source util/sconfig/sconfig.* for devicetree compiler..
|| This file is licensed under Creative Commons Attribution 2.5 License.|
In short: you are free to distribute and modify the file as long as you attribute its author(s) or licensor(s).