Difference between revisions of "Easy projects"

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(flashrom: Added timing info, new chips, testing)
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If you're a coreboot or flashrom newbie, this page is for you.
 
If you're a coreboot or flashrom newbie, this page is for you.
  
=[[flashrom]]=
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== coreboot ==
A tool to read/write coreboot/BIOS images from/to flash chips.
 
  
==Add timing info to flash chip definitions==
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=== Formatting and whitespace cleanup ===
Go through the list of flash chips in flashchips.c inside the flashrom source. For each chip (except SPI chips), read through the data sheets and add a comment to the flash chip definition which contains the timing information in microseconds(!) for the probe sequence.
 
  
This will make probing a lot more reliable.
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We try to maintain the code in the [[Development_Guidelines#Coding_Style Linux style]], but occasionally white-space and other formatting issues find their way into the project. Formatting and white-space changes should be done in small groups as a separate patch from code changes. Be careful running indent/lindent. The results are not always the right thing to do and require review.
  
Every annotated chip helps.
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Run 'util/lint/lint-007-checkpatch' to see a list of issues that need to be addressed.  Note that these should probably be addressed in groups - Handle a group of LEADING_SPACE issues or SPACING issues together.
  
==Add the bus type to flash chip definitions==
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=== Adding copyright headers to all files ===
Go through the list of flash chips in flashchips.c inside the flashrom source. Look for chip definitions which have .bustype = CHIP_BUSTYPE_NONSPI and look at their data sheets. Read the data sheets and try to figure out the flash bus they use (Parallel/LPC/FWH/SPI). Change the bustype field to CHIP_BUSTYPE_PARALLEL etc. and post a patch to the list.
 
  
This will make probing faster and more reliable.
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We want to have copyright headers on all .c, .h, and .asl files (and maybe others as well, but if we had them in all of these files, that would be great.)  The list of files that don't have headers can be seen by running the util/lint/lint-000-license-headers script from the coreboot directory.  To add a header to the file, you need to verify the origin of the file, so you should run a git log on it.  There may also already be information at the top of the file about what kind of license should be used.  If the file is original to coreboot, it should get the standard coreboot license header.  If it has some other license, the appropriate header should be added.
  
Even a single updated chip helps.
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Run 'util/lint/lint-000-license-headers' to see a list of files that still need headers.
  
[[Flashrom#Communication_bus_protocol]] has a writeup on how to figure out the bus type.
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== Payloads ==
  
==Add new flash chip definitions==
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coreboot can use a number of different [[Payloads|payloads]].
We have a few dozen chip IDs listed in flash.h, but not in flashchips.c. Find them, dig up the data sheets and add chip definitions for them to flashchips.c. You can use similar flash chips as a guideline.
 
  
This will reduce the number of undetected chips.
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=== Add/test new supported payloads ===
  
Every added chip broadens flashrom support.
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* Test syslinux (probably requires [[SeaBIOS]] in addition, needs to be checked).
  
==Test flashrom==
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== flashrom ==
If you have a desktop (no laptops/notebooks/netbooks), please run
 
flashrom
 
and check if it finds your flash chip. If it does and any of the operations are listed as unsupported, we'd like to hear about it. If your flash chip is not found, we'd like to hear about it as well.
 
  
In both cases, please send the output of
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The [http://www.flashrom.org flashrom] tool can read/write coreboot/BIOS images from/to flash chips.
flashrom -V
 
to the coreboot mailing list (preferred) or to flashrom@coreboot.org
 
  
=coreboot=
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* See [http://flashrom.org/Easy_projects flashrom's Easy Projects] list for details.
I'll skip explaining what coreboot is. The whole wiki is about this topic and I can't summarize it in one sentence.
 
  
==coreboot v2==
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== Other ==
The workhorse version of coreboot. Lots of supported boards, but difficult to work with.
 
  
TODO: Add easy tasks here.
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* Add [http://tracker.coreboot.org/trac/coreboot/ticket/95 support for using coreboot in VirtualBox].
 
 
==coreboot v3==
 
The next generation version of coreboot. Few supported boards, still in the design testing phase, easy to work with.
 
 
 
TODO: Add easy tasks here.
 

Latest revision as of 20:13, 20 January 2017

You probably came here trying to find a small (minutes to hours) and easy task where you can get your hands dirty and get results immediately.

If you're a coreboot or flashrom newbie, this page is for you.

coreboot

Formatting and whitespace cleanup

We try to maintain the code in the Development_Guidelines#Coding_Style Linux style, but occasionally white-space and other formatting issues find their way into the project. Formatting and white-space changes should be done in small groups as a separate patch from code changes. Be careful running indent/lindent. The results are not always the right thing to do and require review.

Run 'util/lint/lint-007-checkpatch' to see a list of issues that need to be addressed. Note that these should probably be addressed in groups - Handle a group of LEADING_SPACE issues or SPACING issues together.

Adding copyright headers to all files

We want to have copyright headers on all .c, .h, and .asl files (and maybe others as well, but if we had them in all of these files, that would be great.) The list of files that don't have headers can be seen by running the util/lint/lint-000-license-headers script from the coreboot directory. To add a header to the file, you need to verify the origin of the file, so you should run a git log on it. There may also already be information at the top of the file about what kind of license should be used. If the file is original to coreboot, it should get the standard coreboot license header. If it has some other license, the appropriate header should be added.

Run 'util/lint/lint-000-license-headers' to see a list of files that still need headers.

Payloads

coreboot can use a number of different payloads.

Add/test new supported payloads

  • Test syslinux (probably requires SeaBIOS in addition, needs to be checked).

flashrom

The flashrom tool can read/write coreboot/BIOS images from/to flash chips.

Other