Difference between revisions of "Intel Sandybridge Build Tutorial"

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(Tutorial for flashing coreboot on Intel Sandybridge systems WIP)
 
 
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Line 1: Line 1:
Step by Step Tutorial How to flash coreboot onto Lenovo T520.
+
Step by Step Tutorial Build Howto, flashing instructions for coreboot on Lenovo T520.
Flashing coreboot on supported Intel SandyBridge / Ivybridge system is very similar to this one.
+
Flashing coreboot on supported Intel SandyBridge (sandy bridge) / Ivybridge (ivy bridge) system is very similar to this one.
 
Steps that need to be changed are marked as those.
 
Steps that need to be changed are marked as those.
  
 
Chapters:
 
Chapters:
  
* Check the board status
 
 
* Setup toolchain
 
* Setup toolchain
 
* Get binary blobs
 
* Get binary blobs
Line 13: Line 12:
 
* Recovery and Debugging
 
* Recovery and Debugging
  
For more information have a look at https://www.coreboot.org/Build_HOWTO
+
For more information have a look at [[Build_HOWTO]]
 +
 
 +
== Related boards ==
 +
The pages listed showes tested configurations, issues and documents the various hardware differences.
 +
 
 +
* [[Board:lenovo/t420]]
 +
* [[Board:lenovo/t520]]
 +
* [[Board:lenovo/x220]]
 +
* [[Board:lenovo/x230]]
 +
* [[Board:lenovo/t530]]
 +
* [[Board:lenovo/t420s]]
 +
* any Sandybridge compatible Laptop
 +
 
 +
== Check the board status page ==
 +
Tested versions and configurations are reported here:
 +
[[Supported_Motherboards]]
  
 
== Get binary blobs ==
 
== Get binary blobs ==
Line 23: Line 37:
 
* Intel Flash descriptor (IFD)
 
* Intel Flash descriptor (IFD)
 
* Intel Gigabit Engine (GBE)
 
* Intel Gigabit Engine (GBE)
 +
* Nvidia VGA Option ROM
  
 +
Some of the blobs can be obtained using vendor BIOS/ME updates.
 +
Just to make sure there are no version mismatches you should read the original BIOS and extract the needed files.
  
 +
=== Setup ===
 
{{Warning|Remove all batteries and unplug the power connector. You have to make sure to supply enough current through the programmer.
 
{{Warning|Remove all batteries and unplug the power connector. You have to make sure to supply enough current through the programmer.
 
The Beaglebone Black onboard voltage regulator doesn't supply enough current. Using an external power supply may be required.
 
The Beaglebone Black onboard voltage regulator doesn't supply enough current. Using an external power supply may be required.
Line 31: Line 49:
 
The T520 flash IC can be programmed in circuit.
 
The T520 flash IC can be programmed in circuit.
  
I used the TIAO USB board to access the flash.
+
=== Reading the flash IC ===
You need a flashrom version supporting the "tumpa" programmer.
+
 
Of course you can read the flash using the Raspberry or BeagleBone, too.
+
Depending on the board there are one or two flash ICs.
 +
The regular size is 8 Mbyte, but some Laptops already have 12 Mbyte (8 + 4).
 +
Please refer to the board specific page to find the location of flash chip.
 +
 
 +
'''Vendor firmware locks the flash and so you need to flash externally '''(unless until someone figures out a way around it).
 +
 
 +
''Please refer to the board pages on how to disassemble your device and how to connect the SPI programmer.''
 +
''On laptops that ships with two flash ICs you have to tie both HOLD pins to a fixed level !''
 +
 
 +
I used the TIAO USB board to access the flash IC.
 +
You need a flashrom version supporting the ''tumpa'' programmer.
 +
Of course you can read the flash using the ''Raspberry'' or ''BeagleBone'', too.
 
To read the flash chip using tumpa programmer:
 
To read the flash chip using tumpa programmer:
  
 
  flashrom -p ft2232_spi:type=tumpa,port=A,divisor=4 -r T520.bin
 
  flashrom -p ft2232_spi:type=tumpa,port=A,divisor=4 -r T520.bin
  
To read the flash chip using raspberry pi:
+
To read the flash chip using raspberry pi or BeagleBone Black:
  
 
  flashrom -p linux_spi:dev=/dev/spidev0.0 -r T520.bin
 
  flashrom -p linux_spi:dev=/dev/spidev0.0 -r T520.bin
  
Extract the binary blobs from the raw flash image:
+
To read the chip using the Bus Pirate:
 +
 
 +
flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -r T520.bin
 +
 
 +
Make sure to dump it multiple times and compare it using ''cmp'' !
 +
On error: lower SPI frequency, check cables, check power, make sure southbridge isn't powered.
 +
 
 +
=== Extracting the raw image ===
 +
 
 +
Extract the binary blobs from the ''raw'' flash image:
  
 
  cd ./util/ifdtool
 
  cd ./util/ifdtool
Line 48: Line 86:
 
  ./ifdtool -x T520.bin
 
  ./ifdtool -x T520.bin
  
The following files will show up:
+
Following files will show up:
  
 
* flashregion_0_flashdescriptor.bin
 
* flashregion_0_flashdescriptor.bin
Line 54: Line 92:
 
* flashregion_2_intel_me.bin
 
* flashregion_2_intel_me.bin
 
* flashregion_3_gbe.bin
 
* flashregion_3_gbe.bin
 +
 +
flashregion_0_flashdescriptor.bin, flashregion_2_intel_me.bin and flashregion_3_gbe.bin are blobs and can be used by coreboot without modification.
 +
 +
=== Nvidia Option ROM ===
 +
If you want to extract the VGA Option Rom have a look at [[VGA_support]].
 +
The stock firmware is an UEFI image. Using UEFIExtract from [https://github.com/LongSoft/UEFITool UEFITool] the two following files can be found:
 +
 +
The Nvidia Option ROM GUID is:
 +
9781FA9D-5A3B-431A-AD59-2748C9A170EC
 +
 +
The Intel Option ROM GUID is:
 +
0AFCDD7A-345E-415E-926D-C5971B580400
 +
 +
Check with romheaders that you got a valid Option Rom !
 +
 +
== Configure Coreboot ==
 +
 +
Run:
 +
make menuconfig
 +
 +
In menu ''General Setup'':
 +
Set "Set CMOS for configuration values"
 +
Allows nvramtool to access CMOS configuration from running system.
 +
 +
In menu ''Mainboard'':
 +
Set "Mainboard Vendor" to "Lenovo"
 +
Set "Mainboard model" to "T520"
 +
 +
For other boards choose your settings here !
 +
 +
In menu ''Chipset'':
 +
Set "Add Intel descriptor.bin file" to "flashregion_0_flashdescriptor.bin"
 +
Set "Add Intel ME firmware" to "flashregion_2_intel_me.bin"
 +
Set "Add Gigabite Ethernet firmware" to "flashregion_3_gbe.bin"
 +
 +
In menu ''Devices'':
 +
Set "Use native graphics initialization"
 +
{{Warning|"native graphics initialization" is only supported on Intel mobile GPUs using LVDS and remove the need to run the Option Rom to get graphics output.}}
 +
 +
In case you want to run VGA Option Rom add it using:
 +
Set "Add a VGA BIOS image" to the VGA Option ROM file
 +
 +
In menu ''Payloads'':
 +
Set "Include generated option rom that implements legacy VGA BIOS"
 +
 +
'''Save the new config'''
 +
 +
Run:
 +
make
 +
 +
== Flashing coreboot ==
 +
 +
=== Get the flash layout ===
 +
 +
1. Extract the flash layout using ifdtool
 +
./util/ifdtool/ifdtool -f T520.layout T520.bin
 +
 +
It creates a file looking like that:
 +
 +
00000000:00000fff fd
 +
00500000:007fffff bios
 +
00003000:004fffff me
 +
00001000:00002fff gbe
 +
00fff000:00000fff pd
 +
00fff000:00ffffff res1
 +
00fff000:00ffffff res2
 +
00fff000:00ffffff res3
 +
00000000:00ffffff ec
 +
 +
2. Remove "disabled" regions:
 +
Remove all regions that are disabled or invalid as flashrom can't ignore them, here:
 +
pd, res1, res2, res3, ec
 +
 +
The new file will look like this:
 +
00000000:00000fff fd
 +
00500000:007fffff bios
 +
00003000:004fffff me
 +
00001000:00002fff gbe
 +
 +
=== Not recommended ===
 +
There is experimental support for flashing coreboot from a running system to override only the BIOS flash region, leaving IFD, ME, and GBE where it is.
 +
flashrom -p internal:laptop=force_I_want_a_brick -l ./T520.layout -i bios -w ./build/coreboot.rom
 +
 +
In case you got a brick, have a look at the next chapter !
 +
=== Recommended ===
 +
''Please refer to the board pages on how to disassemble your device and how to connect the SPI programmer.''
 +
''On laptops that ships with two flash ICs you have to tie both HOLD pins to a fixed level !''
 +
 +
Connect an external programmer to your flash IC and run the flashrom command to override only the BIOS flash region, leaving IFD, ME, and GBE where it is.
 +
flashrom -p ft2232_spi:type=tumpa,port=A,divisor=4 -l ./T520.layout -i bios -w ./build/coreboot.rom
 +
 +
You can of course override the whole flash and remove ME firmware read protection.
 +
 +
flashrom -p ft2232_spi:type=tumpa,port=A,divisor=4 -w ./build/coreboot.rom
 +
 +
=== Overwriting the whole flash ===
 +
 +
In case you bricked something or you want to replace the ME blob you have to write the whole flash IC.
 +
In this case there's no need for a layout file. The command to write the coreboot image is:
 +
 +
  flashrom -p ft2232_spi:type=tumpa,port=A,divisor=4 -w ./build/coreboot.rom
 +
 +
{{Warning|Sandybridge Chipsets need a matching ME blob and IFD ! The board won't boot at all if one of them is invalid.}}
 +
 +
== Recovery and Debugging ==
 +
 +
=== Reading flash IC fails ===
 +
see next chapter
 +
=== Read raw images differ ===
 +
If you have trouble reading the chip successfully, the most common problems are:
 +
 +
* Insufficient power supply
 +
* Bad contacts
 +
* Too long wires
 +
* Bad pinout
 +
* Floating HOLD pins
 +
* Southbridge is powered and communicates to flash IC
 +
* high SPI frequency
 +
 +
=== I got a brick ===
 +
After using internal:laptop=force_I_want_a_brick it doesn't power on.
 +
 +
Disassemble the laptop and flash external.
 +
 +
=== It powers on but the screen stays black ===
 +
Most likely a critical error occured.
 +
 +
You can recompile coreboot to generate logging output.
 +
Recommended for Lenovo laptops is using [[EHCI_Debug_Port]].

Latest revision as of 09:10, 6 October 2016

Step by Step Tutorial Build Howto, flashing instructions for coreboot on Lenovo T520. Flashing coreboot on supported Intel SandyBridge (sandy bridge) / Ivybridge (ivy bridge) system is very similar to this one. Steps that need to be changed are marked as those.

Chapters:

  • Setup toolchain
  • Get binary blobs
  • Configure coreboot
  • Build coreboot
  • Flash coreboot
  • Recovery and Debugging

For more information have a look at Build_HOWTO

Related boards

The pages listed showes tested configurations, issues and documents the various hardware differences.

Check the board status page

Tested versions and configurations are reported here: Supported_Motherboards

Get binary blobs

Coreboot needs some binary blobs. Here's a list of blobs required: Binary_situation

I'm going to use:

  • Intel Management Engine (ME)
  • Intel Flash descriptor (IFD)
  • Intel Gigabit Engine (GBE)
  • Nvidia VGA Option ROM

Some of the blobs can be obtained using vendor BIOS/ME updates. Just to make sure there are no version mismatches you should read the original BIOS and extract the needed files.

Setup

Warning: Remove all batteries and unplug the power connector. You have to make sure to supply enough current through the programmer.

The Beaglebone Black onboard voltage regulator doesn't supply enough current. Using an external power supply may be required.

Some flash chips can't be programmed while soldered, as the southbridge is powered, too, and communicates with the flash.

The T520 flash IC can be programmed in circuit.

Reading the flash IC

Depending on the board there are one or two flash ICs. The regular size is 8 Mbyte, but some Laptops already have 12 Mbyte (8 + 4). Please refer to the board specific page to find the location of flash chip.

Vendor firmware locks the flash and so you need to flash externally (unless until someone figures out a way around it).

Please refer to the board pages on how to disassemble your device and how to connect the SPI programmer. On laptops that ships with two flash ICs you have to tie both HOLD pins to a fixed level !

I used the TIAO USB board to access the flash IC. You need a flashrom version supporting the tumpa programmer. Of course you can read the flash using the Raspberry or BeagleBone, too. To read the flash chip using tumpa programmer:

flashrom -p ft2232_spi:type=tumpa,port=A,divisor=4 -r T520.bin

To read the flash chip using raspberry pi or BeagleBone Black:

flashrom -p linux_spi:dev=/dev/spidev0.0 -r T520.bin

To read the chip using the Bus Pirate:

flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -r T520.bin

Make sure to dump it multiple times and compare it using cmp ! On error: lower SPI frequency, check cables, check power, make sure southbridge isn't powered.

Extracting the raw image

Extract the binary blobs from the raw flash image:

cd ./util/ifdtool
make
./ifdtool -x T520.bin

Following files will show up:

  • flashregion_0_flashdescriptor.bin
  • flashregion_1_bios.bin
  • flashregion_2_intel_me.bin
  • flashregion_3_gbe.bin

flashregion_0_flashdescriptor.bin, flashregion_2_intel_me.bin and flashregion_3_gbe.bin are blobs and can be used by coreboot without modification.

Nvidia Option ROM

If you want to extract the VGA Option Rom have a look at VGA_support. The stock firmware is an UEFI image. Using UEFIExtract from UEFITool the two following files can be found:

The Nvidia Option ROM GUID is:

9781FA9D-5A3B-431A-AD59-2748C9A170EC

The Intel Option ROM GUID is:

0AFCDD7A-345E-415E-926D-C5971B580400

Check with romheaders that you got a valid Option Rom !

Configure Coreboot

Run:

make menuconfig

In menu General Setup:

Set "Set CMOS for configuration values"

Allows nvramtool to access CMOS configuration from running system.

In menu Mainboard:

Set "Mainboard Vendor" to "Lenovo"
Set "Mainboard model" to "T520"

For other boards choose your settings here !

In menu Chipset:

Set "Add Intel descriptor.bin file" to "flashregion_0_flashdescriptor.bin"
Set "Add Intel ME firmware" to "flashregion_2_intel_me.bin"
Set "Add Gigabite Ethernet firmware" to "flashregion_3_gbe.bin"

In menu Devices:

Set "Use native graphics initialization"
Warning: "native graphics initialization" is only supported on Intel mobile GPUs using LVDS and remove the need to run the Option Rom to get graphics output.

In case you want to run VGA Option Rom add it using:

Set "Add a VGA BIOS image" to the VGA Option ROM file

In menu Payloads:

Set "Include generated option rom that implements legacy VGA BIOS"

Save the new config

Run:

make

Flashing coreboot

Get the flash layout

1. Extract the flash layout using ifdtool

./util/ifdtool/ifdtool -f T520.layout T520.bin

It creates a file looking like that:

00000000:00000fff fd
00500000:007fffff bios
00003000:004fffff me
00001000:00002fff gbe
00fff000:00000fff pd
00fff000:00ffffff res1
00fff000:00ffffff res2
00fff000:00ffffff res3
00000000:00ffffff ec

2. Remove "disabled" regions: Remove all regions that are disabled or invalid as flashrom can't ignore them, here:

pd, res1, res2, res3, ec

The new file will look like this:

00000000:00000fff fd
00500000:007fffff bios
00003000:004fffff me
00001000:00002fff gbe

Not recommended

There is experimental support for flashing coreboot from a running system to override only the BIOS flash region, leaving IFD, ME, and GBE where it is.

flashrom -p internal:laptop=force_I_want_a_brick -l ./T520.layout -i bios -w ./build/coreboot.rom

In case you got a brick, have a look at the next chapter !

Recommended

Please refer to the board pages on how to disassemble your device and how to connect the SPI programmer. On laptops that ships with two flash ICs you have to tie both HOLD pins to a fixed level !

Connect an external programmer to your flash IC and run the flashrom command to override only the BIOS flash region, leaving IFD, ME, and GBE where it is.

flashrom -p ft2232_spi:type=tumpa,port=A,divisor=4 -l ./T520.layout -i bios -w ./build/coreboot.rom

You can of course override the whole flash and remove ME firmware read protection.

flashrom -p ft2232_spi:type=tumpa,port=A,divisor=4 -w ./build/coreboot.rom

Overwriting the whole flash

In case you bricked something or you want to replace the ME blob you have to write the whole flash IC. In this case there's no need for a layout file. The command to write the coreboot image is:

 flashrom -p ft2232_spi:type=tumpa,port=A,divisor=4 -w ./build/coreboot.rom
Warning: Sandybridge Chipsets need a matching ME blob and IFD ! The board won't boot at all if one of them is invalid.

Recovery and Debugging

Reading flash IC fails

see next chapter

Read raw images differ

If you have trouble reading the chip successfully, the most common problems are:

  • Insufficient power supply
  • Bad contacts
  • Too long wires
  • Bad pinout
  • Floating HOLD pins
  • Southbridge is powered and communicates to flash IC
  • high SPI frequency

I got a brick

After using internal:laptop=force_I_want_a_brick it doesn't power on.

Disassemble the laptop and flash external.

It powers on but the screen stays black

Most likely a critical error occured.

You can recompile coreboot to generate logging output. Recommended for Lenovo laptops is using EHCI_Debug_Port.