Nvidia MCP55 Porting Notes: Difference between revisions
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(Created page with '== Interrupt Routing Registers == '''Values for routing IRQ's:''' {| border="0" style="font-size: smaller" |- bgcolor="#6699ff" ! align="left" | Value ! align="left" | APIC Pin...') |
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Revision as of 22:16, 10 June 2009
Interrupt Routing Registers
Values for routing IRQ's:
Value | APIC Pin (hex.) | APIC Pin (dec.) |
---|---|---|
0x01 | 0x17 | 23 |
0x02 | 0x16 | 22 |
0x03 | 0x10 | 16 |
0x04 | 0x11 | 17 |
0x05 | 0x05 | 5 |
0x06 | 0x12 | 18 |
0x07 | 0x7 | 7 |
0x08 | 0x14 | 20 |
0x09 | 0x09 | 9 |
0x0A | 0x0a | 10 |
0x0B | 0x0b | 11 |
0x0C | 0x13 | 19 |
0x0D | 0x15 | 21 |
0x0E | 0x0E | 14 |
0x0F | 0x0F | 15 |