Difference between revisions of "Rating System"
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− | At the coreboot summit 2008 in Denver we talked about a rating system for supported boards. The idea is to make it clear which boards are most highly recommended because the vendors cooperate. | + | At the coreboot summit 2008 in Denver we talked about a rating system for supported boards. The idea is to make it clear which boards are most highly recommended because the vendors cooperate. Thus the 'Vendor Cooperation Score' rating system was born. |
= Introduction = | = Introduction = | ||
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* Availability of documentation (nothing/NDA restricted == 0, NDA but free to publish code == 3, online with click through == 7, public URL == 10) | * Availability of documentation (nothing/NDA restricted == 0, NDA but free to publish code == 3, online with click through == 7, public URL == 10) | ||
** There should be multiple categories of documentation (register set, BIOS programming guide, errata, schematics or pinouts (for motherboards)) | ** There should be multiple categories of documentation (register set, BIOS programming guide, errata, schematics or pinouts (for motherboards)) | ||
− | |||
− | |||
− | |||
− | |||
* "Hackability" | * "Hackability" | ||
** LPC header, JTAG header, BIOS socket, etc. | ** LPC header, JTAG header, BIOS socket, etc. | ||
** Should we dock a board because it requires soldering or a difficult process for flashing coreboot? | ** Should we dock a board because it requires soldering or a difficult process for flashing coreboot? | ||
* ... | * ... | ||
+ | * Availability of example and support code | ||
+ | ** ACPI tables | ||
+ | ** flashrom support | ||
+ | ** driver code | ||
As we list boards, we should also make it clear if a board is actually available for purchase. A board might get a high rating, but be unavailable for purchase, in which case it should be carefully marked as such. Board availability will change over a board's lifespan. | As we list boards, we should also make it clear if a board is actually available for purchase. A board might get a high rating, but be unavailable for purchase, in which case it should be carefully marked as such. Board availability will change over a board's lifespan. | ||
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= Criteria = | = Criteria = | ||
− | When all the criteria have been evaluated, each platform will end up with a total score. To assign " | + | When all the criteria have been evaluated, each platform will end up with a total score. To assign "hares" to the platform, we will divide the number of scored points by the number of maximum possible points and multiply that with the number of maximum hares (probably 5) and round down to the nearest half hare (bunny?). |
== Documentation == | == Documentation == | ||
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| 3 || Documentation is restricted and only available under Non Disclosure Agreement, however the NDA allows source code written with the documentation to be freely available under the GPL (or another Free Software license). | | 3 || Documentation is restricted and only available under Non Disclosure Agreement, however the NDA allows source code written with the documentation to be freely available under the GPL (or another Free Software license). | ||
|- | |- | ||
− | | 0 || Documentation is not available or the NDA does | + | | 0 || Documentation is not available or the NDA does not allow release of code. |
|} | |} | ||
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* Schematics / Pinout (Sufficient documentation to detail the platform specific GPIO & IRQ assignments) | * Schematics / Pinout (Sufficient documentation to detail the platform specific GPIO & IRQ assignments) | ||
− | == | + | == Hackability == |
+ | |||
+ | Use the following criteria to evaluate the hackability of a board. Maximum possible score: 24. | ||
− | + | Rom chip: | |
{| border="1" | {| border="1" | ||
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!Description | !Description | ||
|- | |- | ||
− | | 10 || | + | | 10 || Socketed rom chip. |
|- | |- | ||
− | | | + | | 1 || Soldered rom chip with space on the board for a secondary rom chip (pads unpopulated). |
|- | |- | ||
− | | | + | | 0 || Soldered rom chip, no space for secondary rom chip. |
− | |||
− | |||
|} | |} | ||
− | + | LPC header: | |
− | |||
− | |||
{| border="1" | {| border="1" | ||
Line 104: | Line 102: | ||
!Description | !Description | ||
|- | |- | ||
− | | | + | | 9 || LPC header, can be used to emulate rom chip. |
|- | |- | ||
− | + | | 0 || No LPC header. | |
− | |||
− | |||
− | |||
− | | 0 || | ||
|} | |} | ||
− | + | JTAG header: | |
− | |||
− | |||
− | |||
− | |||
{| border="1" | {| border="1" | ||
Line 124: | Line 114: | ||
!Description | !Description | ||
|- | |- | ||
− | | | + | | 5 || JTAG header. |
|- | |- | ||
− | + | | 0 || No JTAG header. | |
− | |||
− | | 0 || | ||
|} | |} | ||
− | + | == Example and support code == | |
+ | |||
+ | Is example and support code readily available? Maximum possible score: 10. | ||
{| border="1" | {| border="1" | ||
Line 138: | Line 128: | ||
!Description | !Description | ||
|- | |- | ||
− | | | + | | 10 || Code is freely available under a free software license. It can be downloaded through a direct URL with no click-through pages. |
+ | |- | ||
+ | | 7 || Code is freely available under a free software license. It can be downloaded on the web after agreeing to a click-through license. | ||
+ | |- | ||
+ | | 7 || Vendor provides code via e-mail, no NDA/license agreement required. | ||
+ | |- | ||
+ | | 3 || Code is restricted and only available under Non Disclosure Agreement, however the NDA allows source code written using the sample code to be freely available under a free software license. | ||
|- | |- | ||
− | | 0 || | + | | 0 || Code is not available or the NDA does now allow release of code. |
|} | |} | ||
− | + | = Adding it all up = | |
+ | |||
+ | The three categories above give us a scale with a maximum of 114 points. We devide that range up in 5 bands, meaning that boards can get a score from zero to five 'hares': | ||
{| border="1" | {| border="1" | ||
|- bgcolor="#6699ff" | |- bgcolor="#6699ff" | ||
!Points | !Points | ||
− | ! | + | !Score |
+ | |- | ||
+ | | 0 || [[Image:zero-hares.png]] | ||
+ | |- | ||
+ | | 1-22 || [[Image:one-hare.png]] | ||
+ | |- | ||
+ | | 23-45 || [[Image:two-hares.png]] | ||
+ | |- | ||
+ | | 46-68 || [[Image:three-hares.png]] | ||
|- | |- | ||
− | | | + | | 69-91 || [[Image:four-hares.png]] |
|- | |- | ||
− | | | + | | 92-114 || [[Image:five-hares.png]] |
|} | |} | ||
+ | |||
+ | = Vendor Participation = | ||
+ | |||
+ | While we don't formally score vendor participation for a board, ongoing vendor participation has many benefits to all parties involved. Regular particpation in the mailing list and other outlets results in higher quality code, faster turn around time on bugs, and more satisfied end users. | ||
= Example Board = | = Example Board = |
Latest revision as of 16:12, 21 August 2008
At the coreboot summit 2008 in Denver we talked about a rating system for supported boards. The idea is to make it clear which boards are most highly recommended because the vendors cooperate. Thus the 'Vendor Cooperation Score' rating system was born.
Contents
Introduction
To get to such a rating for a particular board, we should establish a list of categories with an associated score. Each fulfilled criteria should be easily verifiable as a yes or no answer. There should be no subjective elements to the rating system — only measurable criteria should be used to avoid bias or favoritism.
Adding up the scores for the major components on a board (CPU, chipsets, mainboard, others?) would give us a rating that results in a number of 'stars'.
Some ideas for those categories:
- Availability of documentation (nothing/NDA restricted == 0, NDA but free to publish code == 3, online with click through == 7, public URL == 10)
- There should be multiple categories of documentation (register set, BIOS programming guide, errata, schematics or pinouts (for motherboards))
- "Hackability"
- LPC header, JTAG header, BIOS socket, etc.
- Should we dock a board because it requires soldering or a difficult process for flashing coreboot?
- ...
- Availability of example and support code
- ACPI tables
- flashrom support
- driver code
As we list boards, we should also make it clear if a board is actually available for purchase. A board might get a high rating, but be unavailable for purchase, in which case it should be carefully marked as such. Board availability will change over a board's lifespan.
Should we provide a separate rating for coreboot support (i.e. the stuff above) and how good our code actually is?
Criteria
When all the criteria have been evaluated, each platform will end up with a total score. To assign "hares" to the platform, we will divide the number of scored points by the number of maximum possible points and multiply that with the number of maximum hares (probably 5) and round down to the nearest half hare (bunny?).
Documentation
Use the following criteria to evaluate each set of documentation:
Points | Description |
---|---|
10 | Documentation is freely available and redistributable. It can be downloaded through a direct URL with no click-through pages. |
7 | Documentation is freely available and redistributable. It can be downloaded on the web after agreeing to a click-through license. |
3 | Documentation is restricted and only available under Non Disclosure Agreement, however the NDA allows source code written with the documentation to be freely available under the GPL (or another Free Software license). |
0 | Documentation is not available or the NDA does not allow release of code. |
X86 based platforms can have up to 80 points for documentation.
CPU
Evaluate the criteria against the following three sets of documentation (30 total points possible):
- Datasheet / register set (detailed information about programming registers and/or memory locations)
- BIOS programming guide
- Errata
Southbridge (chipset)
Evaluate the criteria against the following three sets of documentation (30 total points possible):
- Datasheet / register set (detailed information about programming registers and/or memory locations)
- BIOS programming guide
- Errata
Other chipsets (Super I/O, etc)
Evaluate the criteria against the following: (10 total points possible). Add 10 points if not applicable to the platform.
- Datasheet / register set (detailed information about programming registers and/or memory locations)
Mainboard
Evaluate the criteria against the following: (10 total points available)
- Schematics / Pinout (Sufficient documentation to detail the platform specific GPIO & IRQ assignments)
Hackability
Use the following criteria to evaluate the hackability of a board. Maximum possible score: 24.
Rom chip:
Points | Description |
---|---|
10 | Socketed rom chip. |
1 | Soldered rom chip with space on the board for a secondary rom chip (pads unpopulated). |
0 | Soldered rom chip, no space for secondary rom chip. |
LPC header:
Points | Description |
---|---|
9 | LPC header, can be used to emulate rom chip. |
0 | No LPC header. |
JTAG header:
Points | Description |
---|---|
5 | JTAG header. |
0 | No JTAG header. |
Example and support code
Is example and support code readily available? Maximum possible score: 10.
Points | Description |
---|---|
10 | Code is freely available under a free software license. It can be downloaded through a direct URL with no click-through pages. |
7 | Code is freely available under a free software license. It can be downloaded on the web after agreeing to a click-through license. |
7 | Vendor provides code via e-mail, no NDA/license agreement required. |
3 | Code is restricted and only available under Non Disclosure Agreement, however the NDA allows source code written using the sample code to be freely available under a free software license. |
0 | Code is not available or the NDA does now allow release of code. |
Adding it all up
The three categories above give us a scale with a maximum of 114 points. We devide that range up in 5 bands, meaning that boards can get a score from zero to five 'hares':
Points | Score |
---|---|
0 | ![]() |
1-22 | ![]() |
23-45 | ![]() |
46-68 | ![]() |
69-91 | ![]() |
92-114 | ![]() |
Vendor Participation
While we don't formally score vendor participation for a board, ongoing vendor participation has many benefits to all parties involved. Regular particpation in the mailing list and other outlets results in higher quality code, faster turn around time on bugs, and more satisfied end users.
Example Board
To demonstrate how this will work, we will apply the above criteria to the db800 platform from AMD, which is widely regarded as one of the better supported platforms in coreboot. (Please fill in this section as new criteria are added).
Total available points: 80 Total platform points: 52 Total "stars": 3
Documentation
Item | Availability | Points |
---|---|---|
CPU (Geode LX) | ||
Datasheet / register set | Freely available [1] | 10 |
BIOS programming guide | NDA allowing GPL'd code | 3 |
Errata | NDA allowing GPL'd code | 3 |
Chipset (CS5536) | ||
Datasheet / register set | Freely available [2] | 10 |
BIOS programming guide | NDA allowing GPL'd code | 3 |
Errata | Freely available [3] | 10 |
Super I/O | ||
Datasheet / register set | Freely available [4] | 10 |
Mainboard | ||
Schematics | NDA allowing GPL'd code | 3 |