Rating System
At the coreboot summit 2008 in Denver we talked about a rating system for supported boards. The idea is to make it clear which boards are most highly recommended because the vendors cooperate.
Contents
Introduction
To get to such a rating for a particular board, we should establish a list of categories with an associated score. Each fulfilled criteria should be easily verifiable as a yes or no answer. There should be no subjective elements to the rating system — only measurable criteria should be used to avoid bias or favoritism.
Adding up the scores for the major components on a board (CPU, chipsets, mainboard, others?) would give us a rating that results in a number of 'stars'.
Some ideas for those categories:
- Availability of documentation (nothing/NDA restricted == 0, NDA but free to publish code == 3, online with click through == 7, public URL == 10)
- There should be multiple categories of documentation (register set, BIOS programming guide, errata, schematics or pinouts (for motherboards))
- Vendor participation in the coreboot project
- How to quantify?
- Availability of example and support code
- ACPI tables
- "Hackability"
- LPC header, JTAG header, BIOS socket, etc.
- Should we dock a board because it requires soldering or a difficult process for flashing coreboot?
- ...
As we list boards, we should also make it clear if a board is actually available for purchase. A board might get a high rating, but be unavailable for purchase, in which case it should be carefully marked as such. Board availability will change over a board's lifespan.
Should we provide a separate rating for coreboot support (i.e. the stuff above) and how good our code actually is?
Criteria
When all the criteria have been evaluated, each platform will end up with a total score. To assign "stars" to the platform, we will divide the number of scored points by the number of maximum possible points and multiply that with the number of maximum stars (probably 5) and round down to the nearest half star.
Documentation
Use the following criteria to evaluate each set of documentation:
Points | Description |
---|---|
10 | Documentation is freely available and redistributable. It can be downloaded through a direct URL with no click-through pages. |
7 | Documentation is freely available and redistributable. It can be downloaded on the web after agreeing to a click-through license. |
3 | Documentation is restricted and only available under Non Disclosure Agreement, however the NDA allows source code written with the documentation to be freely available under the GPL (or another Free Software license). |
0 | Documentation is not available or the NDA does now allow release of code. |
X86 based platforms can have up to 80 points for documentation.
CPU
Evaluate the criteria against the following three sets of documentation (30 total points possible):
- Datasheet / register set (detailed information about programming registers and/or memory locations)
- BIOS programming guide
- Errata
Southbridge (chipset)
Evaluate the criteria against the following three sets of documentation (30 total points possible):
- Datasheet / register set (detailed information about programming registers and/or memory locations)
- BIOS programming guide
- Errata
Other chipsets (Super I/O, etc)
Evaluate the criteria against the following: (10 total points possible). Add 10 points if not applicable to the platform.
- Datasheet / register set (detailed information about programming registers and/or memory locations)
Mainboard
Evaluate the criteria against the following: (10 total points available)
- Schematics / Pinout (Sufficient documentation to detail the platform specific GPIO & IRQ assignments)
Vendor participation
Does the board vendor participate directly in the coreboot project?
Points | Description |
---|---|
10 | Vendor employs people who are active in the project and contribute code. |
8 | Vendor has contributed the coreboot port, and supports it by participating in the project and addressing any bugs. |
5 | Vendor has contributed the coreboot port, but has disappeared from the project. |
0 | No direct vendor participation. |
Example and support code
Is example code and support readily available?
Hackability
Use the following criteria to evaluate the hackability of a board. Maximum possible score: 24.
Rom chip:
Points | Description |
---|---|
10 | Socketed rom chip. |
1 | Soldered rom chip with space on the board for a secondary rom chip (pads unpopulated). |
0 | Soldered rom chip, no space for secondary rom chip. |
LPC header:
Points | Description |
---|---|
9 | LPC header, can be used to emulate rom chip. |
0 | No LPC header. |
JTAG header:
Points | Description |
---|---|
5 | JTAG header. |
0 | No JTAG header. |
Example Board
To demonstrate how this will work, we will apply the above criteria to the db800 platform from AMD, which is widely regarded as one of the better supported platforms in coreboot. (Please fill in this section as new criteria are added).
Total available points: 80 Total platform points: 52 Total "stars": 3
Documentation
Item | Availability | Points |
---|---|---|
CPU (Geode LX) | ||
Datasheet / register set | Freely available [1] | 10 |
BIOS programming guide | NDA allowing GPL'd code | 3 |
Errata | NDA allowing GPL'd code | 3 |
Chipset (CS5536) | ||
Datasheet / register set | Freely available [2] | 10 |
BIOS programming guide | NDA allowing GPL'd code | 3 |
Errata | Freely available [3] | 10 |
Super I/O | ||
Datasheet / register set | Freely available [4] | 10 |
Mainboard | ||
Schematics | NDA allowing GPL'd code | 3 |