SeaBIOS (previously known as LegacyBIOS) is an open-source legacy BIOS implementation, which can also be used as coreboot payload.
Any software requiring 16-bit BIOS services benefits from SeaBIOS, e.g. Windows or Linux (booting through standard GRUB). Linux booting will work out of the box. Generally Windows booting will also work, but Windows might require some more ACPI tweaks therefore it may not complete the boot (STOP 0xA5).
Windows XP has been booted on real hardware with coreboot and SeaBIOS. Some patches are required.
Windows Vista (64/32 bit) has been booted on real hardware with coreboot and SeaBIOS. Some patches are required.
Windows 7 Beta
Windows 7 Beta (64 bit) has been booted on real hardware with coreboot and SeaBIOS. Some patches required.
GRUB works with coreboot and SeaBIOS on real hardware and boots Linux just fine.
You can download the latest version of SeaBIOS through a git repository:
$ git clone git://git.linuxtogo.org/home/kevin/seabios.git seabios $ cd seabios
Edit src/config.h and set the following values:
#define CONFIG_COREBOOT 1 #define CONFIG_DEBUG_SERIAL 1 #define CONFIG_OPTIONROMS_DEPLOYED 0 #define CONFIG_COREBOOT_FLASH 1 #define CONFIG_VGAHOOKS 1
The final SeaBIOS payload file is out/bios.bin.elf, which can be used with coreboot v2 or v3.
For best results, use coreboot-v2 and edit the targets/..../Config.lb with the following:
option CONFIG_CBFS = 1 option HAVE_HIGH_TABLES = 1 ... romimage "fallback" ... payload /path/to/seabios/out/bios.bin.elf end
Unfortunately, many boards don't have HAVE_HIGH_TABLES support, yet. If the build fails complaining about this option, one can edit the src/mainboard/<vendor>/<board>/Options.lb file and add a "uses HAVE_HIGH_TABLES" line. Then one can edit src/arch/i386/boot/tables.c and change the lines:
uint64_t high_tables_base = 0; uint64_t high_tables_size;
uint64_t high_tables_base = ( <memorysize> ) * 1024 * 1024 - (64 * 1024); uint64_t high_tables_size = 64 * 1024;
where <memorysize> is the amount of memory (in MiB) available on the target machine, but not more than 3072. So, if you have more than 3GiB of RAM installed, put 3072. Otherwise, put the number of MiB of RAM installed in your machine.
Alternatively, one can add proper support for HAVE_HIGH_TABLES.
Once the above is done, the final image will be in coreboot.rom.
SeaBIOS and CBFS
SeaBIOS can read the coreboot flash filesystem and extract option ROMs and payloads.
When SeaBIOS scans the target machine's PCI devices, it will recognize option ROMs in CBFS that have the form pciVVVV,DDDD.rom. It will also run any file in the directory vgaroms/ as a vga option rom not specific to a device and files in genroms/ as a generic option ROM not specific to a device. In the above cases, SeaBIOS will recognize files with a .lzma suffix, and automatically decompress them (eg, pci1106,3344.rom.lzma and vgaroms/sgabios.bin.lzma).
SeaBIOS will also load payloads found in the CBFS directory img/.
The examples below show some common uses of this feature.
Adding a VGA option ROM
It is frequently necessary to add a VGA option ROM for built-in VGA adapters so that they are properly initialized.
The first step is to find the vendor and device ID of the VGA adapter. This information can be found from lspci:
$ lspci -vnn ... 01:00.0 VGA compatible controller : VIA Technologies, Inc. UniChrome Pro IGP [1106:3344] (rev 01) (prog-if 00 [VGA controller])
In the above example, the VGA vendor/device ID is 1106:3344. Obtain the VGA ROM (eg, vgabios.bin) and add it to the ROM with:
$ ./cbfs/cbfstool coreboot.rom add /path/to/vgabios.bin pci1106,3344.rom 0 $ ./cbfs/cbfstool coreboot.rom print
Alternatively, SeaBIOS supports LZMA compressed option ROMs. Use the following to add a compressed option ROM instead:
$ lzma -zc /path/to/vgabios.bin > vgabios.bin.lzma $ ./cbfs/cbfstool coreboot.rom add vgabios.bin.lzma pci1106,3344.rom.lzma 0 $ ./cbfs/cbfstool coreboot.rom print
After the above is done, one can write the coreboot.rom file to flash. SeaBIOS will extract the VGA ROM and run it during boot.
Adding gpxe support
A gpxe option ROM can nicely complement SeaBIOS and coreboot by adding network boot support. Adding gpxe is similar to #Adding a VGA option ROM. The first step is to find the Ethernet vendor/device ID. For example:
$ lspci -vnn ... 00:09.0 Ethernet controller : Realtek Semiconductor Co., Ltd. RTL-8110SC/8169SC Gigabit Ethernet [10ec:8167] (rev 10)
Then one can build a gpxe option ROM. For example:
$ cd /path/to/gpxe/src/ $ make bin/10ec8167.rom
And add it to the coreboot image. For example:
$ ./cbfs/cbfstool coreboot.rom add /path/to/gpxe/src/bin/10ec8167.rom pci10ec,8167.rom 0 $ ./cbfs/cbfstool coreboot.rom print
As with VGA option ROMs, the gpxe option ROM may be compressed with LZMA. However, compression won't significantly reduce gpxe's size as it implements its own compression.
In addition to gpxe, other option ROMs can be added in the same manor.
Adding sgabios support
An sgabios option ROM can forward some VGA BIOS requests over a serial port.
Unfortunately, the current version of sgabios (as of 20090617) does not implement a proper checksum. As a work around, a tool from the seabios source repo can fix the checksum:
$ /path/to/seabios/tools/buildrom.py /path/to/sgabios.bin sgabios-fixed.bin
Once the above is done, place the ROM file in the vgaroms/ directory of CBFS. For example:
$ ./cbfs/cbfstool coreboot.rom add sgabios-fixed.bin vgaroms/sgabios.bin 0 $ ./cbfs/cbfstool coreboot.rom print
Most payloads can also be launched from SeaBIOS. To add a payload, build the corresponding .elf file and then add it to the coreboot.rom file in the img/ directory. For example:
$ ./cbfs/cbfstool coreboot.rom add-payload /path/to/payload.elf img/MyPayload l $ ./cbfs/cbfstool coreboot.rom print
During boot, one can press the F12 key to get a boot menu. SeaBIOS will show all files in the img/ directory, and one can instruct SeaBIOS to run them.
Note, SeaBIOS currently supports uncompressed and LZMA compressed payloads. The nrv2b compression algorithm is not supported.