Shuttle SN25P

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Revision as of 00:24, 7 September 2008 by Vince (talk | contribs) (→‎Notes)
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The wiki is being retired!

Documentation is now handled by the same processes we use for code: Add something to the Documentation/ directory in the coreboot repo, and it will be rendered to Contributions welcome!


This is just a work-in-progress status page, the port is not functional yet.

Linux kernel hangs in tty_io.c console_init() and as VGA is not working...


I started my work on Shuttle SN25P motherboard by looking at supported mainboards page, chose a supported one that has similar hardware (Asus A8N-E)

Uwe told me where to start modifiying the code to adapt it to motherboard specificities, and more importantly, where to find the information to put in place.


  • AMD K8 Northbridge
  • NVIDIA CK804 Southbridge
  • ITE IT8712F Super I/O
  • AMD Opteron 165 dual core Socket 939
  • 2 * 1 GB PC-3200 DDR-SDRAM
  • RD1 PMC4 BIOS Savior
  • PMC Pm49FL004T-33JC - spare flash chips for work and backup (in case I flash the RD1 with a non working image)
  • SST 49LF004B 33-4C-NH - spare, not tested


  • flashrom from linux over legacy BIOS
  • Serial console
  • Coreboot runs
  • Load & run payload (tested OK: EtherBoot, coreinfo, filo & memtest86)
  • Filo loads a kernel & jump to its entry point
  • Kernel start to boot and hang at the console handling code, right after "Detected 1800.234 MHz processor.", trying to acquire_console_sem()


  • VGA (not in coreboot, not in filo, not in memtest86, not in linux kernel)
  • Keyboard (idem)
  • Etherboot (onboard nvidia ethernet adapter not properly configured by coreboot)
  • Network


  • - should be OK
  • irq_tables.c - should be OK
  • mptable.c - should be OK, linux kernel apic=debug output is identical as with legacy BIOS
  • get_bus_conf.c - should be OK (be careful to look for PCI busses enumeration order differences between coreboot and legacy BIOS. Don't blindly try to replicate what lspci over BIOS is telling you, look at what coreboot debug info is showing for PCI busses enumeration)

Information gathering

  • /proc/interrupts
  • dmidecode - Flash ROM chip size
  • getpir - infos for irq_tables.c & mptable.c
  • mptable - infos for mptable.c
  • superiotool -dV - infos for device tree
  • flashrom -V - Is your motherboard flashrom capable (northbridge + super I/O + flash chip)
  • lspci -tnvv - PCI bus tree from legacy BIOS
  • lspci -vvvxx - PCI devices informations
  • setpci -s 0:0:1.0 7c.L - infos for "Initialize interrupt mapping" in mptable.c
  • setpci -s 0:0:1.0 80.L - infos for "Initialize interrupt mapping" in mptable.c
  • setpci -s 0:0:1.0 84.L - infos for "Initialize interrupt mapping" in mptable.c


  • Make it boot to Xorg
  • Test onboard HW: SATA, CDROM, USB, Firewire, mouse, keyboard, audio, fan & temperature control
  • PCIe-x16 GFX & ethernet
  • HPET
  • ACPI
  • Etherboot for BCM - TG3 PCIe 1x addon card
  • LAB ? (may need bigger flash)
  • Other payloads


  • Linux kernel command line options:
    • Used ones:
      • apic=debug
      • acpi=off
      • debug
      • irqpoll
      • hpet=force
      • maxcpus=1
      • mem=64M
      • loglevel=8
      • console=tty0
      • console=ttyS0,115200
      • earlycon=uart8250,io,0x3f8
      • earlyprintk=serial,ttyS0,115200
    • To test:
      • noapic
      • parport=0
      • lapic
      • disable_8254_timer
      • enable_8254_timer
  • PCI bus numbering is dynamic:
    • do not try to hardcode the numbers
    • get_bus_conf() creates a bus number map for use in mptable.c & irq_tables.c
    • isa_bus is just assigned a number after the last pci-style bus