Changes related to "Supported Motherboards"

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Show new changes starting from 06:37, 27 July 2016
   
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22 July 2016

     18:06  Board:emulation/spike-riscv‎‎ (2 changes | history) . . (+288). . [Jn‎ (2×)]
     18:06 (cur | prev) . . (-45). . Jn (Talk | contribs) (Build instructions)
     16:08 (cur | prev) . . (+333). . Jn (Talk | contribs) (Building bbl)

20 July 2016

     01:51  Board:emulation/spike-riscv‎‎ (2 changes | history) . . (-358). . [Jn‎ (2×)]
     01:51 (cur | prev) . . (-89). . Jn (Talk | contribs) (Building coreboot with bbl)
     00:54 (cur | prev) . . (-269). . Jn (Talk | contribs) (Building coreboot with bbl)

19 July 2016

     22:49  Board:emulation/spike-riscv‎ (diff | hist) . . (-374). . Jn (Talk | contribs) (Building coreboot without a payload)

12 July 2016

     00:36  Board:lenovo/x200‎ (diff | hist) . . (+242). . Swiftgeek (Talk | contribs) (Thermal Throttling info)

1 July 2016

     19:43  Board:emulation/spike-riscv‎‎ (2 changes | history) . . (-6). . [Jn‎ (2×)]
     19:43 (cur | prev) . . (-4). . Jn (Talk | contribs) (Building coreboot without a payload)
     19:14 (cur | prev) . . (-2). . Jn (Talk | contribs) (Building the toolchain)

30 June 2016

     22:35  Board:emulation/spike-riscv‎‎ (9 changes | history) . . (+12,801). . [Jn‎ (9×)]
     22:35 (cur | prev) . . (+89). . Jn (Talk | contribs) (Building coreboot with bbl)
     03:05 (cur | prev) . . (+223). . Jn (Talk | contribs) (Building coreboot with bbl)
 m   02:18 (cur | prev) . . (0). . Jn (Talk | contribs) (boot log)
     02:18 (cur | prev) . . (-251). . Jn (Talk | contribs) (boot log)
     02:15 (cur | prev) . . (+591). . Jn (Talk | contribs) (fix boot log)
     02:10 (cur | prev) . . (+11,653). . Jn (Talk | contribs) (boot log)
     01:39 (cur | prev) . . (+45). . Jn (Talk | contribs) (Build instructions)
     01:11 (cur | prev) . . (+111). . Jn (Talk | contribs) (Building the toolchain)
     01:08 (cur | prev) . . (+352). . Jn (Talk | contribs) (Building coreboot without a payload)

29 June 2016

     23:29  Board:emulation/spike-riscv‎‎ (2 changes | history) . . (+2,429). . [Jn‎ (2×)]
     23:29 (cur | prev) . . (+56). . Jn (Talk | contribs) (Building coreboot with bbl)
     22:40 (cur | prev) . . (+2,373). . Jn (Talk | contribs) (Build instructions)