Talk:FOSDEM 2010: Difference between revisions

From coreboot
Jump to navigation Jump to search
Line 15: Line 15:
=== Rudolf acpi ===
=== Rudolf acpi ===
* what for is ACPI
* what for is ACPI
* Sleep states in more detail - S1 S2 S3 S4 S5
* CPU power modes C1/C2/C3
* hardware side - PM regs
* hardware side - PM regs
* CPU power modes C1/C2/C3
* software architecture of ACPI
* software architecture of ACPI
* Tables in more detail
* Tables in more detail
Line 22: Line 23:
* Coreboot specific stuff - perhaps the ACPIgen
* Coreboot specific stuff - perhaps the ACPIgen
* and SSDT generation
* and SSDT generation


=== Rudolf board porting ===
=== Rudolf board porting ===

Revision as of 00:09, 18 January 2010

Peter intro

what is coreboot - history - motivation payloads and compression other software in same or related fields sibling projects: seabios serialice coreinfo bayou libpayload buildrom mkelfImage nvramtool superiotool inteltool msrtool flashrom

Peter technical details

modern pc architecture ram init cache-as-ram gcc vs. romcc mention system management mode mention embedded controllers and capabilities and tasks

Rudolf acpi

  • what for is ACPI
  • Sleep states in more detail - S1 S2 S3 S4 S5
  • CPU power modes C1/C2/C3
  • hardware side - PM regs
  • software architecture of ACPI
  • Tables in more detail
  • Some tour through it acpiextract iasl
  • Coreboot specific stuff - perhaps the ACPIgen
  • and SSDT generation

Rudolf board porting

  • Get to know your HW (lspci, superiotool)
  • serial setup + troubles wrong OSC speeds
  • GPIO setup
  • watchdogs - yes ite has default on :)
  • IRQ routing
  • ACPI specific stuff for each board
  • porting on supported chipset - describe the early setup for mainboard + directory content for the board
  • some ideas for porting on new unsupported chipset

Carl-Daniel flashrom

Luc board enable reverse engineering