Difference between revisions of "User:Fchmmr"

From coreboot
Jump to: navigation, search
 
(9 intermediate revisions by the same user not shown)
Line 1: Line 1:
For X60 and X60s.
+
I am the maintainer for the [http://libreboot.org/ libreboot project]
('''not for the T60 or T60p''')x
 
Note, '''[http://www.coreboot.org/User:Samnob samnob] has confirmed that this will also work on the X60t (tablet version)'''.
 
  
thanks go to [http://www.coreboot.org/User:GNUtoo GNUtoo], [http://www.coreboot.org/User:PaulePanter PaulePanter], patrickg, [http://www.coreboot.org/User:Phcoder phcoder] and others, for all your help so far.
+
You can contact me on freenode IRC, with my handle 'francis7'.
 
+
(previously 'fchmmr')
Use this guide to create the coreboot.rom image for flashing.
 
Use the main wiki guide for flashing instruction: http://www.coreboot.org/Board:lenovo/x60 (but use the coreboot.rom that you made here)
 
 
 
== Compile GNUtoo's branch of coreboot with: ==
 
A summary of what you will be doing:
 
- GRUB2 payload ('''necessary. the native graphics code requires GRUB2 as a payload''')
 
- native graphics (free replacement for the proprietary VGA option ROM / Video BIOS / VBIOS)
 
- nonfree microcode removed (entire coreboot source code, not just X60. rm -rf)
 
- thinkpad_acpi support (loads automatically, without tweaking GNU/Linux or grub - tested in Trisquel 6)
 
 
 
Note: the upstream coreboot has a Kconfig option for grub2. i didn't use that. here i compiled grub2 payload manually... (upstream coreboot isn't used. we are using gnutoo's code)
 
 
 
notes: in trisquel 6 i updated to linux-libre 3.12 and it works! newer kernels now can be used (graphics work, backlight turns on etc). '''i got a boot message: invalid i915 rom contents.'''
 
(but it works, from a users perspective)
 
 
 
== Dependencies ==
 
This is something that I did before hand. Note: I did these on [http://www.trisquel.info Trisquel 6]
 
 
 
note: you also need python2 (and make sure "make" uses it instead of python3)
 
I already had this in trisquel, so I didn't need to install it. (seabios compilation)
 
 
 
# (these are used to download the latest source code for coreboot, flashrom and bucts)
 
 
 
$ '''sudo apt-get -y install subversion git'''
 
 
 
# (these contain tools used for compiling source code)
 
 
 
$ '''sudo apt-get -y install build-essential'''
 
 
 
# (these are required for building coreboot)
 
 
 
$ '''sudo apt-get -y install libncurses5-dev doxygen iasl gdb flex bison'''
 
 
 
# (required for building flashrom)
 
 
 
$ '''sudo apt-get -y install libpci-dev pciutils zlib1g-dev libftdi-dev'''
 
 
 
# (i installed these before compiling grub2. As per [https://help.ubuntu.com/community/UEFIBooting this guide])
 
 
 
$ '''sudo apt-get install bison libopts25 libselinux1-dev autogen m4 autoconf help2man libopts25-dev flex libfont-freetype-perl automake autotools-dev libfreetype6-dev texinfo'''
 
 
 
# (you also need to install unifont (for text in grub2)
 
$ '''sudo apt-get -y install ttf-unifont'''
 
 
 
== Getting started ==
 
 
 
$ '''git clone git://gitorious.org/gnutoo-for-coreboot/build-makefiles.git'''
 
 
 
(get the grub config, etc)
 
 
 
that is where i got the grub.cfg from.
 
 
 
rename it to grub.custom.cfg and put it in the root of the grub source code directory
 
 
 
(see below)
 
 
 
note: i'm not using this. i adapted my own.
 
 
 
 
 
 
 
$ '''git clone git://gitorious.org/gnutoo-for-coreboot/coreboot.git'''
 
 
 
$ '''cd coreboot'''
 
 
 
$ '''git checkout 6ec9b1637b4e75de0ae4e2de258f72a7811aafbf'''
 
 
 
(the checkout gets gnutoo's patches to remove microcode, etc)
 
 
 
the .config (included in this post), put it in the coreboot directory.
 
I got it from here, which GNUtoo uploaded:
 
'''[http://paste.debian.net/68794 GNUtoo's .config]'''
 
 
 
Now coreboot is there, with the right config.
 
 
 
Now need to compile grub2 before compiling coreboot.
 
 
 
 
 
 
 
come out of coreboot:
 
 
 
$ '''cd ..'''
 
 
 
do that:
 
 
 
$ '''git clone git://git.savannah.gnu.org/grub.git'''
 
 
 
$ '''cd grub'''
 
 
 
$ '''./autogen.sh'''
 
 
 
$ '''./configure --with-platform=coreboot'''
 
 
 
$ '''make'''
 
 
 
 
 
 
 
Now we need to create a grub elf file as the payload:
 
 
 
'''note: in the root directory of the grub source code, make a grub.custom.cfg with your grub config text inside. Do this before creating grub2-X60.elf as per the command below. Here is what I put inside my grub.custom.cfg: [http://paste.debian.net/69573/ grub.custom.cfg] -- UPDATE: here is my new config: [http://pastebay.com/1370294 grub.custom.cfg]'''
 
 
 
'''NOTE: in grub.custom.cfg, on the "linux" line, change root= to what it is for you. for me its /dev/sda1, but for instance your kernel might be on /dev/sda2'''
 
 
 
do that command (it will also use your grub.custom.cfg):
 
 
 
$ '''./grub-mkstandalone --grub-mkimage=./grub-mkimage -O i386-coreboot -o grub2-X60.elf --modules='ahci pata ehci uhci ohci usb_keyboard usbms part_msdos xfs ext2 fat at_keyboard part_gpt usbserial_usbdebug cbfs minix_be minix minix3_be minix3 minix2_be minix2 zfs ufs2 ufs1_be ufs1 udf squash4 sfs romfs jfs reiserfs procfs odc ntfs nilfs2 newc iso9660 hfsplus cpio exfat cpio_be afs affs btrfs bfs hfs video_bochs video_cirrus password png keystatus sleep loopback' --install-modules='ls linux search configfile normal cbtime cbls memrw iorw minicmd lsmmap lspci halt reboot hexdump pcidump regexp setpci lsacpi chain test' --fonts= --themes= --locales= -d grub-core/ /boot/grub/grub.cfg=grub.custom.cfg'''
 
 
 
 
 
 
 
test grub2-X60.elf in a coreboot.rom compiled for qemu first (not covered in this guide).
 
 
 
assuming that it works, continue on...
 
 
 
 
 
ok,
 
 
 
now to build coreboot.rom. '''first see notes at the end about nonfree microcode .h files.'''
 
 
 
just put grub2-X60.elf (it will be in the root of the grub source directory) in coreboot directory.
 
 
 
in '''make menuconfig''', change the path to say grub2-X60.elf
 
 
 
thinkpad_acpi and other modules are not automatically loaded, but there is a fix.
 
I tried this advice from http://www.coreboot.org/Thinkpad_X60s#thinkpad_acpi_compatibility
 
 
 
Follow those instructions (a backup is included here, see notes at the end) but for those make menuconfig options, use the ones from *your* factory bios.
 
 
 
then:
 
 
 
$ '''make'''
 
 
 
 
 
and now a coreboot.rom is in ./build/
 
 
 
 
 
if you are flashing this for the first time on a machine that has the factory bios, then using the
 
 
 
coreboot.rom just follow the wiki insturctions, especially with regards to the dd commands and the bucts commands
 
 
 
 
 
most important:
 
 
 
$ '''cd build'''
 
 
 
$ '''dd if=coreboot.rom of=top64k.bin bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x10000] count=64k'''
 
 
 
$ '''dd if=coreboot.rom bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k | hexdump'''
 
 
 
$ '''dd if=top64k.bin of=coreboot.rom bs=1 seek=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k conv=notrunc'''
 
 
 
flash the resulting coreboot.rom like you normally would.
 
 
 
(with the dd commands you should also be able to use the flashing procedure from factory BIOS, but I
 
haven't tested that. yet)
 
 
 
 
 
see below:
 
 
 
 
 
 
 
---
 
 
 
== .config ==
 
 
 
.config (put it in root coreboot source directory) is like this:
 
download that text, save it as .config and put it in coreboot source directory
 
(you need it)
 
http://paste.debian.net/68794
 
 
 
=== thinkpad_acpi compatibility ===
 
The following commit might be interesting to cherry-pick:
 
git fetch http://review.coreboot.org/coreboot refs/changes/03/3403/3 && git cherry-pick FETCH_HEAD
 
 
 
Dmidecode from the BIOS says:
 
BIOS Information
 
Vendor: LENOVO
 
Version: 7BETC7WW (2.08 )
 
So in make menuconfig go in
 
General setup  --->
 
And modify Local version string accordinly
 
(7BETC7WW (2.08 )) Local version string
 
 
 
Then locate the following in dmidecode:
 
System Information
 
Manufacturer: LENOVO
 
Product Name: 1707Y8W
 
Version: ThinkPad X60
 
Serial Number: L3BY949
 
Then in
 
Mainboard  --->
 
do that:
 
(L3BY949) Serial number
 
(ThinkPad X60) Version number
 
(LENOVO) BIOS table vendor string
 
(ThinkPad X60 / X60s) BIOS table part number string
 
Then configure and build coreboot as usual
 
 
 
<s>To modprobe the module use that:
 
modprobe thinkpad_acpi force_load=1 debug=0xffff fan_control=1 experimental=1
 
</s>
 
The module should now load automatically...
 
 
 
 
 
== nonfree microcode blobs (.h header files) ==
 
 
 
GNUtoo's patch is supposed to disable the nonfree microcode on the X60.
 
There are still some .h files. I am deleting those and then trying to build coreboot.rom again, and testing it. As I understand it, these are microcode blobs - they are proprietary. I'm not sure if some of those .h files are for X60 and that the microcode is merely disabled or actually removed. Maybe these are for other machines too.
 
In any case, I want to remove them.
 
 
 
UPDATE: a coreboot.rom is compiled after removing those (now I will test it):
 
 
 
'''UPDATE: After removing those .h files (microcode blobs) and then recompiling coreboot.rom for X60 (as above), it still worked. GRUB worked, it could boot my distro. Everything works.'''
 
 
 
Do that command to remove the .h files:
 
 
 
rm -rf coreboot/src/cpu/intel/model_68x/microcode-617-MU16860c.h coreboot/src/cpu/intel/model_68x/microcode-550-MU168307.h coreboot/src/cpu/intel/model_68x/microcode-618-MU268602.h coreboot/src/cpu/intel/model_68x/microcode-729-MU268310.h coreboot/src/cpu/intel/model_68x/microcode-535-MU16810e.h coreboot/src/cpu/intel/model_68x/microcode-727-MU168313.h coreboot/src/cpu/intel/model_68x/microcode-551-MU168308.h coreboot/src/cpu/intel/model_68x/microcode-536-MU16810f.h coreboot/src/cpu/intel/model_68x/microcode-662-MU168a01.h coreboot/src/cpu/intel/model_68x/microcode-728-MU168314.h coreboot/src/cpu/intel/model_68x/microcode-538-MU168111.h coreboot/src/cpu/intel/model_68x/microcode-611-MU168607.h coreboot/src/cpu/intel/model_68x/microcode-615-MU16860a.h coreboot/src/cpu/intel/model_68x/microcode-534-MU16810d.h coreboot/src/cpu/intel/model_68x/microcode-691-MU168a04.h coreboot/src/cpu/intel/model_68x/microcode-692-MU168a05.h coreboot/src/cpu/intel/model_68x/microcode-612-MU168608.h coreboot/src/cpu/intel/model_68x/microcode-537-MU268110.h coreboot/src/cpu/intel/model_1067x/microcode-m011067660F.h coreboot/src/cpu/intel/model_1067x/microcode-m401067660F.h coreboot/src/cpu/intel/model_1067x/microcode-m441067AA0B.h coreboot/src/cpu/intel/model_1067x/microcode-m101067660F.h coreboot/src/cpu/intel/model_1067x/microcode-m041067660F.h coreboot/src/cpu/intel/model_1067x/microcode-m111067AA0B.h coreboot/src/cpu/intel/model_1067x/microcode-m801067660F.h coreboot/src/cpu/intel/model_1067x/microcode-mA01067AA0B.h coreboot/src/cpu/intel/model_1067x/microcode-m101067770A.h coreboot/src/cpu/intel/model_67x/microcode-540-MU267238.h coreboot/src/cpu/intel/model_67x/microcode-531-MU26732e.h coreboot/src/cpu/intel/model_67x/microcode-293-MU267114.h coreboot/src/cpu/intel/model_67x/microcode-539-MU167210.h coreboot/src/cpu/intel/model_67x/microcode-530-MU16730e.h coreboot/src/cpu/intel/model_65x/microcode-409-MU16522c.h coreboot/src/cpu/intel/model_65x/microcode-423-MU26522b.h coreboot/src/cpu/intel/model_65x/microcode-147-MU16502f.h coreboot/src/cpu/intel/model_65x/microcode-435-MU165141.h coreboot/src/cpu/intel/model_65x/microcode-94-MU265019.h coreboot/src/cpu/intel/model_65x/microcode-411-MU16530c.h coreboot/src/cpu/intel/model_65x/microcode-452-MU165310.h coreboot/src/cpu/intel/model_65x/microcode-412-MU16530d.h coreboot/src/cpu/intel/model_65x/microcode-430-MU165041.h coreboot/src/cpu/intel/model_65x/microcode-433-MU165045.h coreboot/src/cpu/intel/model_65x/microcode-410-MU16522d.h coreboot/src/cpu/intel/model_65x/microcode-407-MU16522a.h coreboot/src/cpu/intel/model_65x/microcode-429-MU165040.h coreboot/src/cpu/intel/model_65x/microcode-146-MU16502e.h coreboot/src/cpu/intel/model_65x/microcode-422-MU26530b.h coreboot/src/cpu/intel/model_65x/microcode-434-MU165140.h coreboot/src/cpu/intel/model_65x/microcode-436-MU165142.h coreboot/src/cpu/intel/model_f1x/microcode-1070-m02f122f.h coreboot/src/cpu/intel/model_f1x/microcode-1069-m04f122e.h coreboot/src/cpu/intel/model_f1x/microcode-1068-m01f122d.h coreboot/src/cpu/intel/model_f1x/microcode-1072-m04f1305.h coreboot/src/cpu/intel/model_6ex/microcode-1869-m806ec59.h coreboot/src/cpu/intel/model_6ex/microcode-1729-m206ec54.h coreboot/src/cpu/intel/model_6ex/microcode-1624-m206e839.h coreboot/src/cpu/intel/model_106cx/microcode-M08106CA107.h coreboot/src/cpu/intel/model_106cx/microcode-M08106C2219.h coreboot/src/cpu/intel/model_106cx/microcode-M04106C2218.h coreboot/src/cpu/intel/model_106cx/microcode-M10106CA107.h coreboot/src/cpu/intel/model_106cx/microcode-M01106C2217.h coreboot/src/cpu/intel/model_106cx/microcode-M04106CA107.h coreboot/src/cpu/intel/model_106cx/microcode-M01106CA107.h coreboot/src/cpu/intel/model_6bx/microcode-737-MU16b11c.h coreboot/src/cpu/intel/model_6bx/microcode-738-MU16b11d.h coreboot/src/cpu/intel/model_6bx/microcode-885-MU16b402.h coreboot/src/cpu/intel/model_6bx/microcode-875-MU16b401.h coreboot/src/cpu/intel/model_206ax/microcode-m12306a9_00000017.h coreboot/src/cpu/intel/model_206ax/microcode-m12206a7_00000028.h coreboot/src/cpu/intel/model_6fx/microcode-m406fbBC.h coreboot/src/cpu/intel/model_6fx/microcode-m206f25c.h coreboot/src/cpu/intel/model_6fx/microcode-m106fbBA.h coreboot/src/cpu/intel/model_6fx/microcode-m106f76a.h coreboot/src/cpu/intel/model_6fx/microcode-m46f6d2.h coreboot/src/cpu/intel/model_6fx/microcode-m206f6d1.h coreboot/src/cpu/intel/model_6fx/microcode-m206fda4.h coreboot/src/cpu/intel/model_6fx/microcode-m16f6d0.h coreboot/src/cpu/intel/model_6fx/microcode-m206fbBA.h coreboot/src/cpu/intel/model_6fx/microcode-m806fda4.h coreboot/src/cpu/intel/model_6fx/microcode-m806fbBA.h coreboot/src/cpu/intel/model_6fx/microcode-m16f25d.h coreboot/src/cpu/intel/model_6fx/microcode-m16fda4.h coreboot/src/cpu/intel/model_6fx/microcode-m016fbBA.h coreboot/src/cpu/intel/model_6fx/microcode-m806fa95.h coreboot/src/cpu/intel/model_6fx/microcode-m086fbBB.h coreboot/src/cpu/intel/model_6fx/microcode-m046fbBC.h coreboot/src/cpu/intel/model_6fx/microcode-m406f76b.h coreboot/src/cpu/intel/model_f4x/microcode-1637-m5cf4a04.h coreboot/src/cpu/intel/model_f4x/microcode-1470-m9df4703.h coreboot/src/cpu/intel/model_f4x/microcode-1735-m01f480c.h coreboot/src/cpu/intel/model_f4x/microcode-1521-m5ff4807.h coreboot/src/cpu/intel/model_f4x/microcode-1466-m02f4116.h coreboot/src/cpu/intel/model_f4x/microcode-1471-mbdf4117.h coreboot/src/cpu/intel/model_f4x/microcode-1462-mbdf4903.h coreboot/src/cpu/intel/model_f4x/microcode-1460-m9df4305.h coreboot/src/cpu/intel/model_f4x/microcode-1469-m9df4406.h coreboot/src/cpu/intel/model_f4x/microcode-1498-m5df4a02.h coreboot/src/cpu/intel/model_f4x/microcode-2492-m02f480e.h coreboot/src/cpu/intel/model_6dx/microcode-1355-m206d618.h coreboot/src/cpu/intel/model_f3x/microcode-1467-m0df330c.h coreboot/src/cpu/intel/model_f3x/microcode-1290-m0df320a.h coreboot/src/cpu/intel/model_f3x/microcode-1468-m1df3417.h coreboot/src/cpu/intel/model_69x/microcode-1376-m8069547.h coreboot/src/cpu/intel/model_69x/microcode-1374-m2069507.h coreboot/src/cpu/intel/model_69x/microcode-1373-m1069507.h coreboot/src/cpu/intel/model_f0x/microcode-965-m01f0a13.h coreboot/src/cpu/intel/model_f0x/microcode-966-m04f0a14.h coreboot/src/cpu/intel/model_f0x/microcode-964-m01f0712.h coreboot/src/cpu/intel/model_f0x/microcode-983-m02f0a15.h coreboot/src/cpu/intel/model_f0x/microcode-678-2f0708.h coreboot/src/cpu/intel/model_f2x/microcode-1341-m01f2529.h coreboot/src/cpu/intel/model_f2x/microcode-1101-m02f2738.h coreboot/src/cpu/intel/model_f2x/microcode-1102-m08f2739.h coreboot/src/cpu/intel/model_f2x/microcode-1339-m04f292e.h coreboot/src/cpu/intel/model_f2x/microcode-1100-m04f2737.h coreboot/src/cpu/intel/model_f2x/microcode-1342-m02f252a.h coreboot/src/cpu/intel/model_f2x/microcode-1105-m08f2420.h coreboot/src/cpu/intel/model_f2x/microcode-1107-m10f2421.h coreboot/src/cpu/intel/model_f2x/microcode-1338-m02f292d.h coreboot/src/cpu/intel/model_f2x/microcode-1343-m04f252b.h coreboot/src/cpu/intel/model_f2x/microcode-1340-m08f292f.h coreboot/src/cpu/intel/model_f2x/microcode-1106-m02f241f.h coreboot/src/cpu/intel/model_f2x/microcode-1104-m04f241e.h coreboot/src/cpu/intel/model_f2x/microcode-1336-m02f2610.h coreboot/src/cpu/intel/model_f2x/microcode-1346-m10f252c.h coreboot/src/cpu/intel/model_6xx/microcode-43-B_c6_617.h coreboot/src/cpu/intel/model_6xx/microcode-620-MU26a401.h coreboot/src/cpu/intel/model_6xx/microcode-359-MU166d06.h coreboot/src/cpu/intel/model_6xx/microcode-398-MU166503.h coreboot/src/cpu/intel/model_6xx/microcode-308-MU163336.h coreboot/src/cpu/intel/model_6xx/microcode-153-d2_619.h coreboot/src/cpu/intel/model_6xx/microcode-51-B_c6_616.h coreboot/src/cpu/intel/model_6xx/microcode-566-mu26a003.h coreboot/src/cpu/intel/model_6xx/microcode-400-MU166a0c.h coreboot/src/cpu/intel/model_6xx/microcode-402-MU166d07.h coreboot/src/cpu/intel/model_6xx/microcode-401-MU166a0d.h coreboot/src/cpu/intel/model_6xx/microcode-386-MU16600a.h coreboot/src/cpu/intel/model_6xx/microcode-309-MU163437.h coreboot/src/cpu/intel/model_6xx/microcode-99-B_c6_612.h coreboot/src/cpu/intel/model_6xx/microcode-588-mu26a101.h coreboot/src/cpu/intel/model_6xx/microcode-399-MU166a0b.h coreboot/src/cpu/intel/model_6xx/microcode-358-MU166d05.h
 
 
 
== nonfree microcode blobs (.h header files) (continued) ==
 
I also found this:
 
user@computer:~/GNUTOO$ find coreboot | grep microcode
 
 
 
coreboot/src/cpu/intel/haswell/microcode-M3240660_ffff000b.h
 
 
 
coreboot/src/cpu/intel/haswell/microcode-M32306c1_ffff000d.h
 
 
 
coreboot/src/cpu/intel/haswell/microcode_blob.h
 
 
 
coreboot/src/cpu/intel/haswell/microcode-M32306c2_ffff0003.h
 
 
 
coreboot/src/cpu/intel/haswell/microcode-M7240650_ffff0007.h
 
 
 
coreboot/src/cpu/intel/haswell/microcode_blob.c
 
 
 
coreboot/src/cpu/intel/haswell/microcode-M7240650_ffff000a.h
 
 
 
coreboot/src/cpu/intel/haswell/microcode-M7240651_00000006.h
 
 
 
coreboot/src/cpu/intel/model_f2x/microcode_m02f2203.h
 
 
 
coreboot/src/cpu/intel/model_206ax/microcode_blob.h
 
 
 
coreboot/src/cpu/intel/model_206ax/microcode_blob.c
 
 
 
coreboot/src/cpu/intel/model_2065x/microcode_blob.h
 
 
 
coreboot/src/cpu/intel/model_2065x/microcode-m9220655_00000003.h
 
 
 
coreboot/src/cpu/intel/model_2065x/microcode_blob.c
 
 
 
coreboot/src/cpu/amd/microcode
 
 
 
coreboot/src/cpu/amd/microcode/microcode.c
 
 
 
coreboot/src/cpu/amd/microcode/Makefile.inc
 
 
 
coreboot/src/cpu/amd/model_10xxx/update_microcode.c
 
 
 
coreboot/src/cpu/amd/model_fxx/microcode_rev_d.h
 
 
 
coreboot/src/cpu/amd/model_fxx/microcode_rev_c.h
 
 
 
coreboot/src/cpu/amd/model_fxx/model_fxx_update_microcode.c
 
 
 
coreboot/src/cpu/amd/model_fxx/microcode_rev_e.h
 
 
 
coreboot/src/include/cpu/intel/microcode.h
 
 
 
coreboot/src/include/cpu/amd/microcode.h
 
 
 
 
 
 
 
I am looking at these and removing those if needed.
 
 
 
UPDATE: I have removed some but not all of these files. The ones that are kept are under GPL and either contain code that loads the blobs, or very little code. These are technically free (as far as I'm aware), so they stay. But the offending files are gone. Like so:
 
 
 
'''removed:'''
 
 
 
coreboot/src/cpu/intel/haswell/microcode-M3240660_ffff000b.h
 
 
 
coreboot/src/cpu/intel/haswell/microcode-M32306c1_ffff000d.h
 
 
 
coreboot/src/cpu/intel/haswell/microcode-M32306c2_ffff0003.h
 
 
 
coreboot/src/cpu/intel/haswell/microcode-M7240650_ffff0007.h
 
 
 
coreboot/src/cpu/intel/haswell/microcode-M7240650_ffff000a.h
 
 
 
coreboot/src/cpu/intel/haswell/microcode-M7240651_00000006.h
 
 
 
coreboot/src/cpu/intel/model_f2x/microcode_m02f2203.h
 
 
 
coreboot/src/cpu/intel/model_2065x/microcode-m9220655_00000003.h
 
 
 
coreboot/src/cpu/amd/model_fxx/microcode_rev_d.h
 
 
 
coreboot/src/cpu/amd/model_fxx/microcode_rev_c.h
 
 
 
coreboot/src/cpu/amd/model_fxx/microcode_rev_e.h
 
 
 
 
 
 
 
'''kept:'''
 
 
 
coreboot/src/cpu/intel/haswell/microcode_blob.h
 
 
 
coreboot/src/cpu/intel/haswell/microcode_blob.c
 
 
 
coreboot/src/cpu/intel/model_206ax/microcode_blob.h
 
 
 
coreboot/src/cpu/intel/model_206ax/microcode_blob.c
 
 
 
coreboot/src/cpu/intel/model_2065x/microcode_blob.h
 
 
 
coreboot/src/cpu/intel/model_2065x/microcode_blob.c
 
 
 
coreboot/src/cpu/amd/microcode
 
 
 
coreboot/src/cpu/amd/microcode/microcode.c
 
 
 
coreboot/src/cpu/amd/microcode/Makefile.inc
 
 
 
coreboot/src/cpu/amd/model_10xxx/update_microcode.c
 
 
 
coreboot/src/cpu/amd/model_fxx/model_fxx_update_microcode.c
 
 
 
coreboot/src/include/cpu/intel/microcode.h
 
 
 
coreboot/src/include/cpu/amd/microcode.h
 
 
 
 
 
Now I will attempt once more to compile a coreboot.rom and test it.
 
 
 
UPDATE: coreboot.rom is compiled. now i will flash it.
 
 
 
'''UPDATE: it is flashed, and works.'''
 
 
 
Do that to remove the offending files:
 
 
 
$ rm -rf coreboot/src/cpu/intel/haswell/microcode-M3240660_ffff000b.h  coreboot/src/cpu/intel/haswell/microcode-M32306c1_ffff000d.h  coreboot/src/cpu/intel/haswell/microcode-M32306c2_ffff0003.h  coreboot/src/cpu/intel/haswell/microcode-M7240650_ffff0007.h  coreboot/src/cpu/intel/haswell/microcode-M7240650_ffff000a.h  coreboot/src/cpu/intel/haswell/microcode-M7240651_00000006.h  coreboot/src/cpu/intel/model_f2x/microcode_m02f2203.h  coreboot/src/cpu/intel/model_2065x/microcode-m9220655_00000003.h  coreboot/src/cpu/amd/model_fxx/microcode_rev_d.h  coreboot/src/cpu/amd/model_fxx/microcode_rev_c.h  coreboot/src/cpu/amd/model_fxx/microcode_rev_e.h
 
 
 
== nonfree microcode blobs (.h header files) (continued again) ==
 
 
 
I found some more files. I need to look at these.
 
 
 
user@computer:~/GNUTOO$ find coreboot | grep Microcode
 
 
 
coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c7.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/DA/F10DaMicrocodePatchTables.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/BL/F10BlMicrocodePatchTables.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/RB/F10RbMicrocodePatchTables.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000d9.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevD/HY/F10HyMicrocodePatchTables.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevE/PH/F10PhMicrocodePatchTables.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch06000624_Enc.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch0600050D_Enc.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatchTables.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch06000425.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/cpuMicrocodePatch.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600110F_Enc.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatchTables.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuMicrocodePatch.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c7.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/DA/F10DaMicrocodePatchTables.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/BL/F10BlMicrocodePatchTables.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/RB/F10RbMicrocodePatchTables.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevD/HY/F10HyMicrocodePatchTables.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevE/PH/F10PhMicrocodePatchTables.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500000B.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000025.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500001A.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000028.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000101.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/ON/F14OnMicrocodePatchTables.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/cpuMicrocodePatch.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c7.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/DA/F10DaMicrocodePatchTables.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/BL/F10BlMicrocodePatchTables.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/RB/F10RbMicrocodePatchTables.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/HY/F10HyMicrocodePatchTables.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/PH/F10PhMicrocodePatchTables.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch03000002.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch0300000f.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/LN/F12LnMicrocodePatchTables.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch0300000e.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuMicrocodePatch.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000b6.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000098.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaMicrocodePatchTables.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlMicrocodePatchTables.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/RB/F10RbMicrocodePatchTables.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000086.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyMicrocodePatchTables.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuMicrocodePatch.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f10/Include/OptionDragonMicrocodeInstall.h
 
 
 
coreboot/src/vendorcode/amd/agesa/f10/Include/OptionMaranelloMicrocodeInstall.h
 
 
 
coreboot/src/vendorcode/amd/agesa/f10/Include/OptionSanMarinoMicrocodeInstall.h
 
 
 
coreboot/src/vendorcode/amd/agesa/f10/Include/OptionNileMicrocodeInstall.h
 
 
 
coreboot/src/vendorcode/amd/agesa/f10/Include/OptionTigrisMicrocodeInstall.h
 
 
 
coreboot/src/vendorcode/amd/agesa/f10/Include/OptionLynxMicrocodeInstall.h
 
 
 
coreboot/src/vendorcode/amd/agesa/f10/Include/OptionDanubeMicrocodeInstall.h
 
 
 
coreboot/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbId7001MicrocodePatch.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbMicrocodePatchTables.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuMicrocodePatch.c
 
 
 
 
 
Looking at the above:
 
 
 
SUSPICIOUS (free license, obscured source code, uncommented. Large blocks of hexadecimal code):
 
 
 
coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c7.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000d9.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch06000624_Enc.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch0600050D_Enc.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch06000425.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600110F_Enc.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c7.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500000B.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000025.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500001A.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000028.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000101.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch03000002.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch0300000f.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch0300000e.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000b6.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000098.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000086.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c
 
 
 
coreboot/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbId7001MicrocodePatch.c
 
 
 
'''Remove them:'''
 
 
 
rm -rf coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c7.c coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000d9.c coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch06000624_Enc.c coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch0600050D_Enc.c coreboot/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x15/OR/F15OrMicrocodePatch06000425.c coreboot/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnMicrocodePatch0600110F_Enc.c coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c7.c coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500000B.c coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000025.c coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch0500001A.c coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000028.c coreboot/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/F14MicrocodePatch05000101.c coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch03000002.c coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch0300000f.c coreboot/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch0300000e.c coreboot/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c coreboot/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000b6.c coreboot/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000098.c coreboot/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000086.c coreboot/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c coreboot/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c coreboot/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Family/0x16/KB/F16KbId7001MicrocodePatch.c
 
 
 
'''coreboot.rom compiled, flashed, and working'''
 

Latest revision as of 23:45, 17 August 2015

I am the maintainer for the libreboot project

You can contact me on freenode IRC, with my handle 'francis7'. (previously 'fchmmr')