Difference between revisions of "User:GNUtoo"

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== Contributions ==
+
== Wiki contributions ==
I've contributed to the following ports:
+
My contributions to this wiki are available under the following licenses:
* M4A785T-M: I've been the main person working on it.
+
* [https://creativecommons.org/licenses/by-sa/3.0/legalcode CC-BY-SA 3.0]
* Lenovo X60: I've been working on the native GPU init, and various other improvements.
+
* [https://creativecommons.org/licenses/by-sa/4.0/legalcode CC-BY-SA 4.0] or later
* Lenovo T60: I've been working on some improvements.
+
* [https://www.gnu.org/licenses/fdl.txt GFDL 1.3] or later
* Alix 1.C: I've been working on some improvements.
+
 
 +
== Code contributions ==
 +
In the [https://review.coreboot.org/gitweb?p=coreboot.git;a=blob;f=Documentation/gerrit_guidelines.md;h=1833b0a8f0dc89001547c73457d113a4a56fbd31;hb=refs/heads/master#l31 gerrit guidelines] there the follwing line: "Don't modify other people's patches without their consent."
 +
 
 +
I consent to the modification of my patches by anybody. I work on specific things because no one wants to do what I want to do. Else I'd be happy if someone else did the work, so I could pick the next task in my huge TODO list.
  
 
Interests:
 
Interests:
 
* 100% Free computers(Laptops, Desktops, Home Servers, routers).
 
* 100% Free computers(Laptops, Desktops, Home Servers, routers).
* Security(Trough GRUB for instance).
+
* Security
 +
** Secure boot trough GRUB with full disk encryption (no /boot in clear)
 +
** Protect against DMA and other attacks that have access to the x86 cpu's RAM.
 +
* Making it possible for end user to be able to use coreboot/libreboot:
 +
** Making it easy or scalable to install coreboot/libreboot.
 +
** Making it usable.
 +
* Making less risky to reflash, permitting users without an external programmer to easily reflash, and developers to develop anywhere without a huge setup consisting of another computer and the coreboot computer beeing worked on. I'm also interested in getting the cbmem logs written to flash to make debugging easier when no other computer is available(for instance while the developer is traveling to a conference).
  
 
== Howtos ==
 
== Howtos ==
=== make recent intel BIOS flash writable and/or extract its pieces ===
+
* [[/make boot software writable for recent Intel computers]]
Coreboot has an uttility in util/ifdtool for that.
+
* [[/External GPU init without running the option rom]]
* power off the laptop totally (remove the power, the battery etc...)
 
* connect an external programmer to the BIOS flash chip.
 
* dump the chip content with flashrom and that external programmer.
 
* run ifdtool on the extracted chip content
 
* reflash the modified content
 
  
== Personal oppinions ==
+
= X60/I945 native GPU init History =
=== Microcode ===
+
The Lenovo X60 GPU init has been merged a long time ago.
The issue about the CPU microcodes is that they are non-free, and under a license that is incompatible with coreboot's license.
+
Since then it has been rewriten/improved a lot by other people (See git log for more details).
 +
Thanks to all that work it's now a proper driver.
  
Practically speaking, I guess that if the microcode is in the cbfs(coreboot filesystem) instead of beeing integrated directly in coreboot, that would count as agrgate work and should be safe, but I'm not a lawyer(so ask a good one instead).
+
So I've moved the X60 GPU init information in [[/X60_GPU_init|a subpage]]
The solution would then be to remove the microcodes from the coreboot repositories.
 
 
 
(I guess that it would then end up in the blob repository instead which is a separate repository, and would then be included in the coreboot filesytem).
 
 
 
Some people say that the microcode is the equivalent of having a more recent CPU, as a justification for using it.
 
Though since Intel microcodes are encrypted and signed, its meaning is not public, therefore we can't really know what's inside, so people usually trust what the CPU vendor say about it, such as that it fixes some bugs(erratas for such bugs are published).
 
 
 
My goal is to have a 100% free computer, and also to spread that code, so that other people can have a 100% free computer too.
 
According to the FSF, and the FSF criterias for differenciating software from hardware, that microcode is software.
 
So since they consider it as non-free, a coreboot image containing that microcode would not be considered free by the FSF.
 
  
On my Lenovo x60, the microcode was easy to remove, and it worked fine, beside printing a scary kernel message pointing to an Intel errata.
+
= Personal oppinions =
Practically speaking, after resuming(so after suspend to ram), the temperatures reading will not be updated, and the temperature overheat will not be reported. The hardware issues you may encounter will depend on your specific CPU, not the model, but instead the date at which it was manufactured.
+
* [[/Microcode]]
 
+
* [[/Yabel]]
The result of it is that the FSF certified the gluglug's lenovo x60: gluglug removed the last microcodes(that were not used by the x60), sent that source code to the FSF, which certified it.
 
So instead of debating trough huge flames aobut the fact that we should use, or not use the microcode, it was more effective to remove it.
 
The benefit is the publicity arround that laptop that can be made 100% free software, which makes users aware of it and willing to switch to it.
 
 
 
=== Yabel ===
 
Yabel is great for tracing what the GPU does.
 
 
 
But the GPUs in the Lenovo x60 and t60 have a bar that gives access to the whole memory:
 
Region 1: I/O ports at 50a0 [size=8]
 
 
 
So using Yabel to prevent the VGA option rom from doing nasty tricks is probably not safe enough.
 
 
 
I was told that many other GPU also have that issue.
 
 
 
The way to fix that is to get rid of the proprietary VGA option rom. On some boards it's possible and coreboot has a replacement for it. On some other boards, the kernel can initialize the GPU with or without tricks.
 
  
 
= For coreboot developers =
 
= For coreboot developers =
Line 67: Line 48:
 
** It probably applies to the Lenovo t60 that have an Intel GPU, with no or very minor modifications.
 
** It probably applies to the Lenovo t60 that have an Intel GPU, with no or very minor modifications.
  
== Hardware ==
+
== My hardware ==
 
=== Mainboard/Devices running coreboot ===
 
=== Mainboard/Devices running coreboot ===
 
{| class="wikitable"  border="1"
 
{| class="wikitable"  border="1"
Line 73: Line 54:
 
! Serial/output
 
! Serial/output
 
! flash recovery mecanism
 
! flash recovery mecanism
! My area of interest
+
! What I worked on
 
|-
 
|-
| M4A785T-M
+
| Asrock E350M1
|
+
|  
 +
* cbmem -c
 
* Serial
 
* Serial
|
+
| rowspan="3" |
 
* External programmer
 
* External programmer
 
* Swapping the flash chip
 
* Swapping the flash chip
 
|
 
|
 +
|-
 +
| Asus F2A85-M PRO
 +
|
 +
* cbmem -c
 +
| rowspan="2" |
 
* I've been the main porter.
 
* I've been the main porter.
 
* Usability improvements
 
* Usability improvements
 +
|-
 +
| Asus M4A785T-M
 +
|
 +
* cbmem -c
 +
* Serial
 
|-
 
|-
 
| Lenovo X60
 
| Lenovo X60
|  
+
| rowspan="4" |
 +
* cbmem -c
 
* Serial on the dock
 
* Serial on the dock
 +
* spkmodem
 
* USB debug
 
* USB debug
* spkmodem
+
| rowspan="5" |
| External programmer with pomona clip
+
* External programmer with pomona clip
|
+
| rowspan="2" |
 
* Native GPU init
 
* Native GPU init
* Secure boot with grub.
 
 
* Usability improvements.
 
* Usability improvements.
 
|-
 
|-
 
| Lenovo X60T
 
| Lenovo X60T
 +
|-
 +
| Lenovo T60
 
|
 
|
* None tried yet
 
* I've no compatbile dock
 
| External programmer with pomona clip
 
|
 
* Native GPU init
 
* Touchscreen support
 
 
* Usability improvements.
 
* Usability improvements.
 
|-
 
|-
 
+
| Lenovo T400
| Lenovo X200T
 
 
|
 
|
* None tried yet
 
* I've no compatbile dock
 
| I didn't flash it yet.
 
|
 
* Making it easier to flash.
 
* Checking its security and freedom to see how it can compare to the Lenovo X60.
 
 
|-
 
|-
| Lenovo T60
+
| Lenovo X200
 
|
 
|
* Serial on the dock
+
* cbmem -c
* USB debug
 
* spkmodem(untried but should work)
 
| External programmer with pomona clip(untried but should work)
 
 
|
 
|
* Native GPU init
 
* Usability improvements.
 
 
|-
 
|-
| Alix 1.C
+
| PC Engines Alix 1.C
 
|
 
|
 
* Serial
 
* Serial
| Hot swap with the LPC dongle
+
|  
|
+
* Hot swap with the LPC dongle|
 
* Usability improvements.
 
* Usability improvements.
|-
 
| E350M1
 
|
 
* Serial
 
* Some other outputs may work but I didn't test them.
 
|
 
* External programmer
 
* Swapping the flash chip
 
|
 
* Powering off the GPU
 
* Low noise home server use case
 
 
|-
 
|-
 
|}
 
|}
  
 
=== Mainboard/Devices not running coreboot (yet?) ===
 
=== Mainboard/Devices not running coreboot (yet?) ===
* <s>HP nc6320</s> Not worth it. I don't have this laptop anymore.
+
If you need to have some tests done on the default boot firwmare, you should ask me as it is fast to do if I've the laptop nearby.
* Asus N71JQ
 
  
Note that they will probably never run coreboot, as I don't think they're worth the time.
+
{| class="wikitable"  border="1"
 +
! Device/Mainboard
 +
! Reason
 +
|-
 +
| Lenovo Thinkpad X200T
 +
| I need to find a way to be able to easily, robustly, and safely reflash it:
 +
* If a SOIC8 SPI chips is soldered instead of the WSON8 one, the solder past must not affect the stability of the SOIC8 clip. That is probably the most adapted way for me.
 +
* Wires aren't ideal if they break easily.
 +
* Internal flashing can't be trusted for freedom/privacy/security: The hardware probably permits boot firmwares to  very easily mess up with the flash content while it's being read or written: The hardware can probably be programmed to emmit SMM interrupts when the flash chip is accessed, and once in SMM, modify the data. This is the case on i945 thinkpads, however I didn't check the X200T datasheet yet, hence the "probably".
 +
|-
 +
|}
  
 
=== Debugging tools ===
 
=== Debugging tools ===
Line 163: Line 138:
 
** a bug20 (omap3530)
 
** a bug20 (omap3530)
 
** a GTA04 A3 (DM370)
 
** a GTA04 A3 (DM370)
 
== Interesting git trees ==
 
* http://www.gitorious.org/gnutoo-for-coreboot/coreboot/ : I push there the code that I use. It's often pushed BEFORE trying it on real hardware.
 
I am usually interested in the following:
 
* Native GPU init for i945
 
* The fallback mecanism
 
* The removal of the microcode
 
So I often have cherry-picked patches from gerrit and have some updated copies of some of them.
 
The microcode removal is probably not in gerrit because it won't be accepted as-is, instead the microcodes have to be moved/removed in a cleaner way for master
 
=== Way less interesting trees ===
 
* http://git.stuge.se/?p=gnutoo-chromiumos-coreboot.git;a=summary : it's an historic tree, containing code that is based on the replay of the option rom, before the native GPU init worked(so it doesn't work).
 
* http://git.stuge.se/?p=gnutoo-i915tool-x60.git;a=summary : contains an historic version of the i915tool
 
  
 
==  My TODO list ==
 
==  My TODO list ==
 
See also TODO of the respectives machines on their dedicated wiki page.
 
See also TODO of the respectives machines on their dedicated wiki page.
=== All machines ===
+
* Merge or abandon my old patches.
* <s>Add a working and easily usable normal/fallback selection.</s> pushed for review
+
* I945, GM45, GS45 thinkpads: Have all hardware features working (feature parity with the default boot firmware):
 +
** IRDA
 +
** TPM
 +
** Testing: write tests for
 +
*** suspend/resume
 +
*** power consumption
 +
*** heat
 +
* GM45: Merge ich9gen functionality in ifdtool or ifdfake
 +
* GM45: Investigate internal flashing (Look if BIOS->Modded BIOS->Coreboot works and understand why)
 +
* I945: SeaBIOS: allow booting on SD cards.
 
* Port a logging mecanism from chromebooks to all devices in order to be able to retrive the log of the failed boot at the next reboot.
 
* Port a logging mecanism from chromebooks to all devices in order to be able to retrive the log of the failed boot at the next reboot.
 +
* Document flash protections and vboot.
 +
* Verify if all the microcodes were moved away from coreboot git.
 +
* (Alix 1.C: port the VSA to fasm)
 +
* (GDB improvements: allow gdb earlier than ramstage)
 +
* I945: Write a freedom/privacy/security review
 +
* GM45: Write a freedom/privacy/security review
 +
* More recent Intel with me_cleaner: Write a freedom/privacy/security review
  
=== T60 ===
+
= Work in progress documentation =
* <s>Find out why the machine hang when the power supply is removed(only does it when the linux kernel is started)</s> Fixed by ./nvramtool -w first_battery=Primary
+
* [[/Blobs-rewrite]]
* Add cmos.default<s>(require disassembling the laptop for testing)</s>
+
* [[/Golden Finger Connector]]
* Add native graphics init(require waiting that Peter stuge push his part for review)
+
* [[/Hardware Comparison]]
* Export reboot_bits in cmos
+
* [[/APU1 reflashing]]
 
 
=== X60 ===
 
* native GPU init and new fallback are pushed for review: Address the concerns.
 
** I pushed the new and complete native GPU init on gitorious, Peter Stuge will work on merging it while I finish addressing the fallback comments.
 
* fix the CPU microcode issue.
 
* update http://www.coreboot.org/Thinkpad_X60s
 
* Create a Native graphics<->VGA option rom.
 
* Make backlight work without the non-free option rom.
 
 
 
==== Later ====
 
* Improve the patch for SerialIce in order to get it merged.
 
* SD detection fix for my X60 version.
 
* Hotkey patch to clean and merge.
 
 
 
=== Alix 1.C ===
 
* Add cbmem -c support
 
* port the VSA to fasm?
 
 
 
=== Asus N71JQ ===
 
Probably not worth it...
 
* Find the USB debug port
 
* Find how to extract the BIOS pieces from the BIOS region
 
== Native X60 GPU init stuff ==
 
=== scripts to help getting rid of the vbios of the x60 ===
 
==== Script 1: generate the io access for the coreboot driver ====
 
* follow "Case study: new laptop (not complete, sorry)" in https://docs.google.com/document/d/1g8FMob25VZYxbWri2iFB8YiSL8gwF9vKJH3HGxr0xQU/edit?pli=1
 
* pacman -S plan9port
 
* cp /opt/plan9/bin/ssam ./
 
* replace the following line in ./ssam:
 
#!/usr/local/plan9/bin/rc
 
by the following line:
 
#!/opt/plan9/bin/rc
 
* create the ssamfix file with:
 
  ,s/\[ *[0-9]+\..[0-9]+\]//g
 
  ,s/^ *//g
 
y/^[RWU]/s/^/M /g
 
  ,s/\nU/ ;;;UDELAY/g
 
  ,|uniq -c
 
  ,s/^ *//g
 
  ,s/(^[0-9]+) ([MRW])/\2 \1/g
 
  ,s/"/\\"/g
 
  ,s/^M ([0-9]+) *(\[.*)/{M, \1, "\2"},/g
 
  ,s/^M ([0-9]+) *(.*)/{M, \1, "\2"},/g
 
  ,s/:  */:/g
 
  ,s/...UDELAY *([0-9]+)/\1/g
 
  ,s/^([RW]) ([0-9]+) (.*):0x([0-9a-f]+)(.*)/{\1, \2, "", \3, 0x\4, \5},/g
 
* run the following commands:
 
. /etc/profile.d/plan9.sh
 
cat dmesg| ./ssam  -f ssamfix > foo.c
 
 
 
==== Script2: compare the io access that were too fast ====
 
* Replace {V,0,}, with {V,7,}, in src/mainboard/vendor/device/i915io.c
 
* cat /dev/ttyUSB0 > accesses.txt
 
* Use that script against accesses.txt to find the guilty accesses:
 
#!/usr/bin/env python2
 
import sys,re
 
 
 
def main(args):
 
try:
 
f = open(args[1],'ro')
 
except:
 
print args[0], " <file>"
 
 
for line in f:
 
if re.match("0x[0-9]*: Got .*, expect .*",line):
 
line = line.replace('\r\n','').replace(", expect ",':').replace(": Got ",':')
 
split = line.split(':')
 
#print split
 
if split[1] != split[2]:
 
print line
 
if __name__ == '__main__':
 
main(sys.argv)
 
 
 
=== How to get semantic IOs ===
 
In i915tool:
 
* import your IOs in prettyregs.c
 
* compile prettyregs.c
 
* run prettyregs
 
 
 
=== How to get rid of the vbios of the x60 [New Version] ===
 
WARNING: DO NOT ATTEMPT TO DO THAT WITHOUT A FLASH RECOVERY MECANISM
 
 
 
Apply the [http://review.coreboot.org/#/c/3277/ coreboot patches], and adapt them for your mainboard
 
 
 
Then configure coreboot with:
 
[*] Output verbose x86emu debug messages
 
[ ]  Trace JMP/RETF
 
[ ]  Trace all opcodes
 
[ ]  Log Plug&Play accesses
 
[ ]  Log Disk I/O
 
[ ]  Log PMM
 
[ ]  Debug VESA BIOS Extensions
 
[ ]   Redirect INT10 output to console
 
[ ]  Log intXX calls
 
[ ]  Log special memory accesses
 
[ ]  Log all memory accesses
 
[*]  Log IO accesses
 
Build and flash coreboot.
 
 
 
git clone [https://code.google.com/r/gnutoo-i915tool-x60/source/list my fork of the i915tool] until the code is merged in the [https://code.google.com/p/i915tool/ official i915tool].
 
 
 
Get the [http://www.coreboot.org/images/4/42/Dennis.tar.gz tarball] that contains the generated code, extract it.
 
 
 
Also get the [http://www.coreboot.org/images/3/39/I915_reg.h.gz i915_regs.h.gz] file, decompress it and put it in final/
 
 
 
Then go into i915tool and apply some patches for the x60 or redo them for your mainboard.
 
 
 
Run make:
 
$ cd i915tool
 
$ make
 
Then go into the x60 directory(or the directory of your device):
 
$ cd x60
 
use picocom -b 115200 /dev/ttyUSB0 or stty to set the bauds of the Serial port.
 
Then get logs:
 
$ cat /dev/ttyUSB0 | tee coreboot.log
 
Then remove the binary symbols, dos2unix will help identifying where they are:
 
$ dos2unix coreboot.log
 
dos2unix: Binary symbol found at line 136332
 
dos2unix: Skipping binary file coreboot.log
 
Then do:
 
$ dos2unix coreboot.log
 
Then remove the lines before and after the log, the log looks like that:
 
[0047229e]c000:51cb outl(0x80001014, 0x0cf8)
 
[0047325f]c000:51d4 inw(0x0cfc) = 0x50a1
 
Then run make and fix the errors:
 
$ make
 
Then copy to coreboot as it says.
 
Then if necessary try to compact the source code a bit, here for me I have a really long list of:
 
io_i915_write32(0xcffbe001,0x8001);
 
io_i915_write32(0xcffbe001,0x8005);
 
io_i915_write32(0xcffbe001,0x8009);
 
io_i915_write32(0xcffbe001,0x800d);
 
io_i915_write32(0xcffbe001,0x8011);
 
That can be replaced with:
 
int i = 0;
 
for (i=0x8001;i<0x3fffa;i+=4){
 
io_i915_write32(0xcffbe001,i);
 
}
 
 
 
Import the final code into the chromium fork of coreboot with my patches on top.
 
 
 
= X60/I945 native GPU init History =
 
The Lenovo X60 GPU init has been merged a long time ago.
 
Since then it has been rewriten/improved a lot by other people (See git log for more details).
 
Thanks to all that work it's now a proper driver.
 
 
 
So I've moved the X60 GPU init information in [[/X60_GPU_init|a subpage]]
 
 
 
= Personal notes =
 
== Patches tracking ==
 
=== Coreboot ===
 
==== TODO ====
 
* *T60*: export reboot_bits
 
 
 
==== fallback improvements ====
 
All the patches necessary to make it work got merged but one:
 
 
 
The remaining patch<ref>lenovo/x60: Require only one failed boot to switch to fallback in X86_BOOTBLOCK_NORMAL mode.
 
</ref> add the following to the x60's Kconfig<ref>src/mainboard/lenovo/x60/Kconfig</ref>:
 
config MAX_REBOOT_CNT
 
        int
 
        default 1
 
 
 
Another optional patch didn't get merged:
 
* "Move set_boot_successful to drivers/pc80/mc146818rtc.c"
 
 
 
 
 
* An old pushed topic branch can be found [http://review.coreboot.org/#/q/status:open+project:coreboot+branch:master+topic:falback-patches-v2,n,z in gerrit]
 
 
 
===== References =====
 
<references/>
 
 
 
==== ACPI patches for thinkpad_acpi ====
 
I've to look up the status of theses, thinkpad_acpi do load
 
 
 
==== Patches that need more work ====
 
* I use a deblob patch, instead the various microcode should be moved out of coreboot repository, they are inside headers.
 
 
 
==== Infrastructure ====
 
* "Add grub.cfg"
 
 
 
=== SerialICE ===
 
=== Flashrom ===
 
 
 
 
 
== Other ==
 
00:52 < phcoder-screen> GNUtoo-irssi: once you asked why upper 128bytes of cmos behave in strange way: you have to enable them in rcba
 
 
 
=== To verify ===
 
* I have bad memory on this, but I was probably told by someone who talked to peter stuge, or by peter stuge that if you blank the flash chip holding the BIOS, in an X61, power off the computer and power it on again, an IPV6 packet would come out of the (wired) NIC. This was due to AMT, which is on the NIC (X61 is old, and at that time AMT was on the intel ethernet NICs).
 
** Once verified, the goal would be to reproduce that on an x200:
 
*** blank the BIOS flash chip, power off the computer, boot it.
 
*** observe an ipv6 packet
 
*** blank the NIC flash chip that holds its fimrware
 
*** hopefully observe no ipv6 packet
 
*** reflash coreboot inisde the BIOS flash chip
 
=> That may be able to produce a test case for knowing if the AMT firmware of the NIC was gone or not, but it does requires external reflashing. Would that be enough to be sure about the intel NIC of the laptops with a similar chipset?
 
 
 
== Sandbox ==
 

Latest revision as of 12:40, 10 May 2018

Wiki contributions

My contributions to this wiki are available under the following licenses:

Code contributions

In the gerrit guidelines there the follwing line: "Don't modify other people's patches without their consent."

I consent to the modification of my patches by anybody. I work on specific things because no one wants to do what I want to do. Else I'd be happy if someone else did the work, so I could pick the next task in my huge TODO list.

Interests:

  • 100% Free computers(Laptops, Desktops, Home Servers, routers).
  • Security
    • Secure boot trough GRUB with full disk encryption (no /boot in clear)
    • Protect against DMA and other attacks that have access to the x86 cpu's RAM.
  • Making it possible for end user to be able to use coreboot/libreboot:
    • Making it easy or scalable to install coreboot/libreboot.
    • Making it usable.
  • Making less risky to reflash, permitting users without an external programmer to easily reflash, and developers to develop anywhere without a huge setup consisting of another computer and the coreboot computer beeing worked on. I'm also interested in getting the cbmem logs written to flash to make debugging easier when no other computer is available(for instance while the developer is traveling to a conference).

Howtos

X60/I945 native GPU init History

The Lenovo X60 GPU init has been merged a long time ago. Since then it has been rewriten/improved a lot by other people (See git log for more details). Thanks to all that work it's now a proper driver.

So I've moved the X60 GPU init information in a subpage

Personal oppinions

For coreboot developers

This section is mainly usefull for finding informations for:

  • Asking me to test some code (that's why I listed all my hardware).
  • Find my work in progress code.
  • Find legacy code.
  • Find what I'm interested in working on:
    • If you want to work on the same thing than me, you could contact me if you want so:
      • I could help if I have time.
      • I could test if I have time.
      • I may have some pointers.
  • HOWTO that documents how to do a native VGA init for the Lenovo x60:
    • It probably applies to the Lenovo t60 that have an Intel GPU, with no or very minor modifications.

My hardware

Mainboard/Devices running coreboot

Device/Mainboard Serial/output flash recovery mecanism What I worked on
Asrock E350M1
  • cbmem -c
  • Serial
  • External programmer
  • Swapping the flash chip
Asus F2A85-M PRO
  • cbmem -c
  • I've been the main porter.
  • Usability improvements
Asus M4A785T-M
  • cbmem -c
  • Serial
Lenovo X60
  • cbmem -c
  • Serial on the dock
  • spkmodem
  • USB debug
  • External programmer with pomona clip
  • Native GPU init
  • Usability improvements.
Lenovo X60T
Lenovo T60
  • Usability improvements.
Lenovo T400
Lenovo X200
  • cbmem -c
PC Engines Alix 1.C
  • Serial
  • Hot swap with the LPC dongle|
  • Usability improvements.

Mainboard/Devices not running coreboot (yet?)

If you need to have some tests done on the default boot firwmare, you should ask me as it is fast to do if I've the laptop nearby.

Device/Mainboard Reason
Lenovo Thinkpad X200T I need to find a way to be able to easily, robustly, and safely reflash it:
  • If a SOIC8 SPI chips is soldered instead of the WSON8 one, the solder past must not affect the stability of the SOIC8 clip. That is probably the most adapted way for me.
  • Wires aren't ideal if they break easily.
  • Internal flashing can't be trusted for freedom/privacy/security: The hardware probably permits boot firmwares to very easily mess up with the flash content while it's being read or written: The hardware can probably be programmed to emmit SMM interrupts when the flash chip is accessed, and once in SMM, modify the data. This is the case on i945 thinkpads, however I didn't check the X200T datasheet yet, hence the "probably".

Debugging tools

  • External programmers :
    • Arduino duemillanove (serprog based)
    • Arduino uno (serprog based)
    • openmoko debug board (FTDI based)
    • bug20 (linux_spi)
  • A pomona clip
  • a null-modem serial cable and 2 USB<->Serial adapters
  • USB debug compatible devices:
    • a bug20 (omap3530)
    • a GTA04 A3 (DM370)

My TODO list

See also TODO of the respectives machines on their dedicated wiki page.

  • Merge or abandon my old patches.
  • I945, GM45, GS45 thinkpads: Have all hardware features working (feature parity with the default boot firmware):
    • IRDA
    • TPM
    • Testing: write tests for
      • suspend/resume
      • power consumption
      • heat
  • GM45: Merge ich9gen functionality in ifdtool or ifdfake
  • GM45: Investigate internal flashing (Look if BIOS->Modded BIOS->Coreboot works and understand why)
  • I945: SeaBIOS: allow booting on SD cards.
  • Port a logging mecanism from chromebooks to all devices in order to be able to retrive the log of the failed boot at the next reboot.
  • Document flash protections and vboot.
  • Verify if all the microcodes were moved away from coreboot git.
  • (Alix 1.C: port the VSA to fasm)
  • (GDB improvements: allow gdb earlier than ramstage)
  • I945: Write a freedom/privacy/security review
  • GM45: Write a freedom/privacy/security review
  • More recent Intel with me_cleaner: Write a freedom/privacy/security review

Work in progress documentation