Difference between revisions of "User:Jn"

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(Created page with "Full name: Jonathan Neuschäfer ==GSoC 2016== During this year's Google Summer of Code, I'm working on improving coreboot's support for RISC-V systems. This involves: - Get...")
 
 
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Full name
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<table>
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<tr><td>Name:</td><td></td></tr>
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<tr><td>IRC (Freenode):</td><td>jn__</td></tr>
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</table>
  
 
==GSoC 2016==
 
==GSoC 2016==
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This involves:
 
This involves:
  
- Getting coreboot to run on [[Board:emulation/spike-riscv SPIKE]] (somewhat done, on an outdated version of SPIKE)
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* Getting coreboot to run on [[Board:emulation/spike-riscv|SPIKE]] (done)
- Getting coreboot+Linux to run on SPIKE
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* Getting coreboot+Linux to run on SPIKE (somewhat done)
- Getting coreboot to run on an FPGA/Softcore platform
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* Getting coreboot to run on an FPGA/Softcore platform
- Getting coreboot+Linux to run on an FPGA
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* Getting coreboot+Linux to run on an FPGA
- Implementing additional features
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* Implementing additional features
- Bugfixes whenever something RISC-V related needs to be fixed
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** e.g. libpayload support, CBMEM, vboot, FreeBSD compatibility, ...
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* Bugfixes whenever something RISC-V related needs to be fixed
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I'm writing weekly blog posts at https://blogs.coreboot.org

Latest revision as of 21:52, 29 June 2016

<</td>

<tr><td>IRC (Freenode):</td><td>jn__</td></tr> </table>

GSoC 2016

During this year's Google Summer of Code, I'm working on improving coreboot's support for RISC-V systems. This involves:

  • Getting coreboot to run on SPIKE (done)
  • Getting coreboot+Linux to run on SPIKE (somewhat done)
  • Getting coreboot to run on an FPGA/Softcore platform
  • Getting coreboot+Linux to run on an FPGA
  • Implementing additional features
    • e.g. libpayload support, CBMEM, vboot, FreeBSD compatibility, ...
  • Bugfixes whenever something RISC-V related needs to be fixed

I'm writing weekly blog posts at https://blogs.coreboot.org

Name: