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GSoC 2016

During this year's Google Summer of Code, I'm working on improving coreboot's support for RISC-V systems. This involves:

- Getting coreboot to run on Board:emulation/spike-riscv SPIKE (somewhat done, on an outdated version of SPIKE) - Getting coreboot+Linux to run on SPIKE - Getting coreboot to run on an FPGA/Softcore platform - Getting coreboot+Linux to run on an FPGA - Implementing additional features - Bugfixes whenever something RISC-V related needs to be fixed