[coreboot-gerrit] New patch to review for coreboot: 365a87c Intel Lynx Point: Use 2 << 24 to clarify that I/O APIC ID is 2

[Paul Menzel (paulepanter@users.sourceforge.net)]

Paul Menzel (paulepanter at users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3123

-gerrit

commit 365a87c6b51fd919e29709d07a153daeae07ef1b
Author: Paul Menzel <paulepanter at users.sourceforge.net>
Date:   Tue Apr 23 13:00:34 2013 +0200

    Intel Lynx Point: Use 2 << 24 to clarify that I/O APIC ID is 2
    
    Commit »haswell: Add initial support for Haswell platforms« (76c3700f)
    [1] used `1 << 25` to set the I/O APIC ID of 2. Instead using
    `2 << 24`, which is the same value, makes it clear, that the
    I/O APIC ID is 2.
    
    Commit »Intel Panther Point PCH: Use 2 << 24 to clarify that APIC ID
    is 2« (8c937c7e) [2] is used as a template.
    
    [1] http://review.coreboot.org/2616
    [2] http://review.coreboot.org/3100
    
    Change-Id: I28f9e90856157b4fdd9a1e781472cc4f51d25ece
    Signed-off-by: Paul Menzel <paulepanter at users.sourceforge.net>
---
 src/southbridge/intel/lynxpoint/lpc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c
index f6c64c5..40e0468 100644
--- a/src/southbridge/intel/lynxpoint/lpc.c
+++ b/src/southbridge/intel/lynxpoint/lpc.c
@@ -56,7 +56,7 @@ static void pch_enable_apic(struct device *dev)
 	pci_write_config8(dev, ACPI_CNTL, 0x80);
 
 	*ioapic_index = 0;
-	*ioapic_data = (1 << 25);
+	*ioapic_data = (2 << 24);
 
 	/* affirm full set of redirection table entries ("write once") */
 	*ioapic_index = 1;