New patch to review for coreboot: d3e799c AMD SATA: Correct »them implement« to »then implement« in comments

[Paul Menzel (paulepanter@users.sourceforge.net)]

Paul Menzel (paulepanter at users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3145

-gerrit

commit d3e799c89fe268dd62e1dbc77c37f083f4d926ee
Author: Paul Menzel <paulepanter at users.sourceforge.net>
Date:   Sun Apr 28 14:44:08 2013 +0200

    AMD SATA: Correct »them implement« to »then implement« in comments
    
    The following command was used to correct all occurences of this typo.
    
        $ git grep -l "them implem" | xargs sed -i 's/them implem/then implem/'
    
    Change-Id: Iebd4635867d67861aaf4d4d64ca8a67e87833f38
    Signed-off-by: Paul Menzel <paulepanter at users.sourceforge.net>
---
 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciMid.c   | 2 +-
 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeMid.c    | 2 +-
 src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Ide2AhciMid.c | 2 +-
 src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/SataIdeMid.c  | 2 +-
 src/vendorcode/amd/cimx/sb800/SATA.c                       | 2 +-
 src/vendorcode/amd/cimx/sb900/Sata.c                       | 2 +-
 6 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciMid.c
index d866d56..7b75acb 100644
--- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciMid.c
+++ b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciMid.c
@@ -68,7 +68,7 @@ FchInitMidSataIde2Ahci (
 
   SataBar5setting (LocalCfgPtr, &Bar5);
   //
-  //If this is not S3 resume and also if SATA set to one of IDE mode, them implement drive detection workaround.
+  //If this is not S3 resume and also if SATA set to one of IDE mode, then implement drive detection workaround.
   //
   if ( ! (LocalCfgPtr->Misc.S3Resume) ) {
     SataDriveDetection (LocalCfgPtr, &Bar5);
diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeMid.c
index c4a75dd..6b4d75d 100644
--- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeMid.c
+++ b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeMid.c
@@ -67,7 +67,7 @@ FchInitMidSataIde (
   Bar5 = 0;
   SataBar5setting (LocalCfgPtr, &Bar5);
   //
-  //If this is not S3 resume and also if SATA set to one of IDE mode, them implement drive detection workaround.
+  //If this is not S3 resume and also if SATA set to one of IDE mode, then implement drive detection workaround.
   //
   if ( ! (LocalCfgPtr->Misc.S3Resume) ) {
     SataDriveDetection (LocalCfgPtr, &Bar5);
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Ide2AhciMid.c b/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Ide2AhciMid.c
index 8cb2fc9..e6d7798 100644
--- a/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Ide2AhciMid.c
+++ b/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/Ide2AhciMid.c
@@ -95,7 +95,7 @@ FchInitMidSataIde2Ahci (
 
   SataBar5setting (LocalCfgPtr, &Bar5);
   //
-  //If this is not S3 resume and also if SATA set to one of IDE mode, them implement drive detection workaround.
+  //If this is not S3 resume and also if SATA set to one of IDE mode, then implement drive detection workaround.
   //
   if ( ! (LocalCfgPtr->Misc.S3Resume) ) {
     SataDriveDetection (LocalCfgPtr, &Bar5);
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/SataIdeMid.c b/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/SataIdeMid.c
index ba89d45..2f30fd3 100644
--- a/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/SataIdeMid.c
+++ b/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Sata/SataIdeMid.c
@@ -94,7 +94,7 @@ FchInitMidSataIde (
   Bar5 = 0;
   SataBar5setting (LocalCfgPtr, &Bar5);
   //
-  //If this is not S3 resume and also if SATA set to one of IDE mode, them implement drive detection workaround.
+  //If this is not S3 resume and also if SATA set to one of IDE mode, then implement drive detection workaround.
   //
   if ( ! (LocalCfgPtr->Misc.S3Resume) ) {
     SataDriveDetection (LocalCfgPtr, &Bar5);
diff --git a/src/vendorcode/amd/cimx/sb800/SATA.c b/src/vendorcode/amd/cimx/sb800/SATA.c
index 4aa3be7..5966ec8 100644
--- a/src/vendorcode/amd/cimx/sb800/SATA.c
+++ b/src/vendorcode/amd/cimx/sb800/SATA.c
@@ -544,7 +544,7 @@ sataInitMidPost (
 {
   UINT32   ddBar5;
   sataBar5setting (pConfig, &ddBar5);
-  //If this is not S3 resume and also if SATA set to one of IDE mode, them implement drive detection workaround.
+  //If this is not S3 resume and also if SATA set to one of IDE mode, then implement drive detection workaround.
   if ( ! (pConfig->S3Resume) && ( ((pConfig->SataClass) != AHCI_MODE)  && ((pConfig->SataClass) != RAID_MODE) ) ) {
     sataDriveDetection (pConfig, &ddBar5);
   }
diff --git a/src/vendorcode/amd/cimx/sb900/Sata.c b/src/vendorcode/amd/cimx/sb900/Sata.c
index 98e1f57..fca8005 100644
--- a/src/vendorcode/amd/cimx/sb900/Sata.c
+++ b/src/vendorcode/amd/cimx/sb900/Sata.c
@@ -852,7 +852,7 @@ sataInitMidPost (
 {
   UINT32   ddBar5;
   sataBar5setting (pConfig, &ddBar5);
-  //If this is not S3 resume and also if SATA set to one of IDE mode, them implement drive detection workaround.
+  //If this is not S3 resume and also if SATA set to one of IDE mode, then implement drive detection workaround.
   if ( ! (pConfig->S3Resume) && ( ((pConfig->SataClass) != AHCI_MODE)  && ((pConfig->SataClass) != RAID_MODE) ) ) {
     sataDriveDetection (pConfig, &ddBar5);
   }