[coreboot-gerrit] Patch set updated for coreboot: a630311 usbdebug: Add option for verbose logging of connection

Kyösti Mälkki (kyosti.malkki@gmail.com) gerrit at coreboot.org
Fri Aug 9 11:12:40 CEST 2013


Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3387

-gerrit

commit a630311beb05c3f79e36e6932800d61ed46aef2b
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Thu Jun 6 10:46:37 2013 +0300

    usbdebug: Add option for verbose logging of connection
    
    Add option to log changes in USB 2.0 EHCI debug port connection.
    For romstage move usbdebug as the last initialised console so one
    actually can see these messages.
    
    Init order of consoles in ramstage is undetermined and unchanged.
    
    Change-Id: I3aceec8a93064bd952886839569e9f5beb6c5720
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/Kconfig           | 10 ++++++++++
 src/console/console.c |  6 +++---
 src/lib/usbdebug.c    | 11 ++---------
 3 files changed, 15 insertions(+), 12 deletions(-)

diff --git a/src/Kconfig b/src/Kconfig
index f65c8e3..ce4488d 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -937,6 +937,16 @@ config DEBUG_SPI_FLASH
 	help
 	  This option enables additional SPI flash related debug messages.
 
+config DEBUG_USBDEBUG
+	bool "Output verbose USB 2.0 EHCI debug dongle messages"
+	default n
+	depends on USBDEBUG
+	help
+	  This option enables additional USB 2.0 debug dongle related messages.
+
+	  Select this to debug the connection of usbdebug dongle. Note that
+	  you need some other working console to receive the messages.
+
 if SOUTHBRIDGE_INTEL_BD82X6X && DEFAULT_CONSOLE_LOGLEVEL_8
 # Only visible with the right southbridge and loglevel.
 config DEBUG_INTEL_ME
diff --git a/src/console/console.c b/src/console/console.c
index 6ebcd8b..b2b06b3 100644
--- a/src/console/console.c
+++ b/src/console/console.c
@@ -104,9 +104,6 @@ void console_init(void)
 #if defined(__BOOT_BLOCK__) && CONFIG_BOOTBLOCK_CONSOLE || \
     !defined(__BOOT_BLOCK__) && CONFIG_EARLY_CONSOLE
 
-#if CONFIG_USBDEBUG
-	usbdebug_init();
-#endif
 #if CONFIG_CONSOLE_SERIAL
 	uart_init();
 #endif
@@ -122,6 +119,9 @@ void console_init(void)
 #if CONFIG_SPKMODEM
 	spkmodem_init();
 #endif
+#if CONFIG_USBDEBUG
+	usbdebug_init();
+#endif
 
 	static const char console_test[] =
 		"\n\ncoreboot-"
diff --git a/src/lib/usbdebug.c b/src/lib/usbdebug.c
index 0d50201..9e6fcac 100644
--- a/src/lib/usbdebug.c
+++ b/src/lib/usbdebug.c
@@ -57,19 +57,12 @@ struct ehci_debug_info {
 	struct dbgp_pipe ep_pipe[DBGP_MAX_ENDPOINTS];
 };
 
-/* Set this to 1 to debug the start-up of EHCI debug port hardware. You need
- * to modify console_init() to initialise some other console before usbdebug
- * to receive the printk lines from here.
- * There will be no real usbdebug console output while DBGP_DEBUG is set.
- */
-#define DBGP_DEBUG 0
-#if DBGP_DEBUG
+#if CONFIG_DEBUG_USBDEBUG
 # define dbgp_printk(fmt_arg...) printk(BIOS_DEBUG, fmt_arg)
 #else
-#define dbgp_printk(fmt_arg...)   do {} while(0)
+# define dbgp_printk(fmt_arg...)   do {} while(0)
 #endif
 
-
 #define USB_DEBUG_DEVNUM 127
 
 #define DBGP_DATA_TOGGLE	0x8800



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