[coreboot-gerrit] Patch set updated for coreboot: 15c785c cpu: Remove BOARD_MICROCODE_CBFS_GENERATE Kconfig option
Alexandru Gagniuc (mr.nuke.me@gmail.com)
gerrit at coreboot.org
Thu Dec 5 03:21:20 CET 2013
Alexandru Gagniuc (mr.nuke.me at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4478
-gerrit
commit 15c785c57d7e5232d382d2562175c6c1d138965f
Author: Alexandru Gagniuc <mr.nuke.me at gmail.com>
Date: Wed Dec 4 16:57:52 2013 -0600
cpu: Remove BOARD_MICROCODE_CBFS_GENERATE Kconfig option
Commit * bdafcfa Add the Intel FSP 206ax CPU core support
Introduced this option. This option was meant to have a board generate
a CBFS file containing microcode. However, microcode generation used to be
enabled by default when CPU_MICROCODE_IN_CBFS was selected.
The introduction of BOARD_MICROCODE_CBFS_GENERATE killed that automatic
default, which is not what we want. This option is misguided in the sense
that it tends to introduce a non-default which had been intentionally a
default. We now have to select two Kconfig options in order to generate
microcode in CBFS, meaning one option is redundant.
Change-Id: I3034833df1a9afa7d6d9d537484cb4ac89d30183
Signed-off-by: Alexandru Gagniuc <mr.nuke.me at gmail.com>
---
src/cpu/Kconfig | 25 ++-----------------------
src/cpu/intel/fsp_model_206ax/Kconfig | 1 -
2 files changed, 2 insertions(+), 24 deletions(-)
diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig
index 46b6f1c..7317bcc 100644
--- a/src/cpu/Kconfig
+++ b/src/cpu/Kconfig
@@ -77,31 +77,10 @@ config CPU_MICROCODE_IN_CBFS
bool
default n
-# The following options (BOARD_MICROCODE_CBFS_*) make it possible for the
-# microcode configuration to be selected in the board-level Kconfig. If
-# you want your platform's microcode to be generated during the build,
-# add "select BOARD_MICROCODE_CBFS_GENERATE" to your mainboard's Kconfig.
-# If you want to use an external microcode file, add "select
-# BOARD_MICROCODE_CBFS_EXTERNAL" instead. If neither of these statements
-# exists in your mainboard's configuration file (or if you include a
-# "select BOARD_MICROCODE_CBFS_NONE" statement), then the ROM image will
-# be built without any microcode.
-config BOARD_MICROCODE_CBFS_NONE
- bool
- default y
-
-config BOARD_MICROCODE_CBFS_GENERATE
- bool
- default n
-
-config BOARD_MICROCODE_CBFS_EXTERNAL
- bool
- default n
-
choice
prompt "Include CPU microcode in CBFS" if ARCH_X86
- default CPU_MICROCODE_CBFS_GENERATE if CPU_MICROCODE_IN_CBFS && BOARD_MICROCODE_CBFS_GENERATE
- default CPU_MICROCODE_CBFS_EXTERNAL if CPU_MICROCODE_IN_CBFS && BOARD_MICROCODE_CBFS_EXTERNAL
+ default CPU_MICROCODE_CBFS_GENERATE if CPU_MICROCODE_IN_CBFS
+ default CPU_MICROCODE_CBFS_EXTERNAL if CPU_MICROCODE_IN_CBFS
default CPU_MICROCODE_CBFS_NONE
config CPU_MICROCODE_CBFS_GENERATE
diff --git a/src/cpu/intel/fsp_model_206ax/Kconfig b/src/cpu/intel/fsp_model_206ax/Kconfig
index 406f8a5..dbff6e0 100644
--- a/src/cpu/intel/fsp_model_206ax/Kconfig
+++ b/src/cpu/intel/fsp_model_206ax/Kconfig
@@ -33,7 +33,6 @@ config CPU_SPECIFIC_OPTIONS
select UDELAY_LAPIC
select SMM_TSEG
select CPU_MICROCODE_IN_CBFS if HAVE_FSP_BIN
- select BOARD_MICROCODE_CBFS_GENERATE
select TSC_SYNC_MFENCE
config BOOTBLOCK_CPU_INIT
More information about the coreboot-gerrit
mailing list