[coreboot-gerrit] Patch set updated for coreboot: 3097aa1 cpu/amd (non-AGESA): Load microcode updates from CBFS
Kyösti Mälkki (kyosti.malkki@gmail.com)
gerrit at coreboot.org
Sun Dec 8 08:55:40 CET 2013
Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4502
-gerrit
commit 3097aa18ee94169fc04507e7e3cf1d4abfe74b8e
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Sun Dec 8 07:21:05 2013 +0200
cpu/amd (non-AGESA): Load microcode updates from CBFS
Change-Id: Ic67856414ea2fea9a9eb95d72136cb05da9483fa
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
src/cpu/amd/microcode/microcode.c | 38 +++++++++++++++-------
src/cpu/amd/model_10xxx/Makefile.inc | 2 ++
src/cpu/amd/model_10xxx/microcode_blob.c | 9 +++++
src/cpu/amd/model_10xxx/update_microcode.c | 18 ++--------
src/cpu/amd/model_fxx/Makefile.inc | 2 ++
src/cpu/amd/model_fxx/microcode_blob.c | 17 ++++++++++
src/cpu/amd/model_fxx/model_fxx_update_microcode.c | 27 ++++-----------
src/include/cpu/amd/microcode.h | 2 +-
8 files changed, 66 insertions(+), 49 deletions(-)
diff --git a/src/cpu/amd/microcode/microcode.c b/src/cpu/amd/microcode/microcode.c
index 46d814e..8428725 100644
--- a/src/cpu/amd/microcode/microcode.c
+++ b/src/cpu/amd/microcode/microcode.c
@@ -21,6 +21,7 @@
#include <console/console.h>
#include <cpu/x86/msr.h>
#include <cpu/amd/microcode.h>
+#include <cbfs.h>
struct microcode {
u32 date_code;
@@ -51,7 +52,7 @@ struct microcode {
u8 x86_code_entry[191];
};
-static int need_apply_patch(struct microcode *m, u32 equivalent_processor_rev_id)
+static int need_apply_patch(const struct microcode *m, u32 equivalent_processor_rev_id)
{
if (m->processor_rev_id != equivalent_processor_rev_id) {
@@ -76,19 +77,13 @@ static int need_apply_patch(struct microcode *m, u32 equivalent_processor_rev_id
return 1;
}
-
-void amd_update_microcode(void *microcode_updates, u32 equivalent_processor_rev_id)
+static void amd_update_microcode(const void *microcode_updates, u32 equivalent_processor_rev_id)
{
- u32 patch_id, new_patch_id;
- struct microcode *m;
- char *c;
+ u32 new_patch_id;
+ const struct microcode *m;
+ const char *c;
msr_t msr;
- msr = rdmsr(0x8b);
- patch_id = msr.lo;
-
- printk(BIOS_DEBUG, "microcode: equivalent rev id = 0x%04x, current patch id = 0x%08x\n", equivalent_processor_rev_id, patch_id);
-
m = microcode_updates;
for(c = microcode_updates; m->date_code; m = (struct microcode *)c) {
@@ -114,3 +109,24 @@ void amd_update_microcode(void *microcode_updates, u32 equivalent_processor_rev_
}
}
+
+#define MICROCODE_CBFS_FILE "cpu_microcode_blob.bin"
+
+void amd_update_microcode_from_cbfs(u32 processor_rev_id)
+{
+ u32 patch_id;
+ msr_t msr;
+ const void *microcode_updates;
+
+ msr = rdmsr(0x8b);
+ patch_id = msr.lo;
+
+ printk(BIOS_DEBUG, "microcode: equivalent rev id = 0x%04x, current patch id = 0x%08x\n", processor_rev_id, patch_id);
+
+ microcode_updates = cbfs_get_file_content(CBFS_DEFAULT_MEDIA,
+ MICROCODE_CBFS_FILE,
+ CBFS_TYPE_MICROCODE);
+
+ if (microcode_updates)
+ amd_update_microcode(microcode_updates, processor_rev_id);
+}
diff --git a/src/cpu/amd/model_10xxx/Makefile.inc b/src/cpu/amd/model_10xxx/Makefile.inc
index c78f640..1c9dc53 100644
--- a/src/cpu/amd/model_10xxx/Makefile.inc
+++ b/src/cpu/amd/model_10xxx/Makefile.inc
@@ -2,3 +2,5 @@ ramstage-y += model_10xxx_init.c
ramstage-y += processor_name.c
romstage-$(CONFIG_UPDATE_CPU_MICROCODE) += update_microcode.c
+
+cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c
diff --git a/src/cpu/amd/model_10xxx/microcode_blob.c b/src/cpu/amd/model_10xxx/microcode_blob.c
new file mode 100644
index 0000000..29a1e70
--- /dev/null
+++ b/src/cpu/amd/model_10xxx/microcode_blob.c
@@ -0,0 +1,9 @@
+unsigned microcode[] = {
+#include CONFIG_AMD_UCODE_PATCH_FILE
+
+ /* Dummy terminator */
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+};
diff --git a/src/cpu/amd/model_10xxx/update_microcode.c b/src/cpu/amd/model_10xxx/update_microcode.c
index 95624e9..8d8048f 100644
--- a/src/cpu/amd/model_10xxx/update_microcode.c
+++ b/src/cpu/amd/model_10xxx/update_microcode.c
@@ -21,9 +21,6 @@
#include <console/console.h>
#include <cpu/amd/microcode.h>
-static const u8 microcode_updates[] __attribute__ ((aligned(16))) = {
-
-#ifdef __PRE_RAM__
/* From the Revision Guide :
* Equivalent Processor Table for AMD Family 10h Processors
@@ -46,16 +43,6 @@ static const u8 microcode_updates[] __attribute__ ((aligned(16))) = {
* 00100FA0h (PH-E0) 10A0h 010000bfh
*/
-#include CONFIG_AMD_UCODE_PATCH_FILE
-
-#endif
- /* Dummy terminator */
- 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0,
-};
-
static u32 get_equivalent_processor_rev_id(u32 orig_id) {
static unsigned id_mapping_table[] = {
0x100f00, 0x1000,
@@ -95,11 +82,10 @@ void update_microcode(u32 cpu_deviceid)
u32 equivalent_processor_rev_id;
/* Update the microcode */
- equivalent_processor_rev_id = get_equivalent_processor_rev_id(cpu_deviceid );
+ equivalent_processor_rev_id = get_equivalent_processor_rev_id(cpu_deviceid);
if (equivalent_processor_rev_id != 0) {
- amd_update_microcode((void *) microcode_updates, equivalent_processor_rev_id);
+ amd_update_microcode_from_cbfs(equivalent_processor_rev_id);
} else {
printk(BIOS_DEBUG, "microcode: rev id not found. Skipping microcode patch!\n");
}
-
}
diff --git a/src/cpu/amd/model_fxx/Makefile.inc b/src/cpu/amd/model_fxx/Makefile.inc
index e016235..1437e88 100644
--- a/src/cpu/amd/model_fxx/Makefile.inc
+++ b/src/cpu/amd/model_fxx/Makefile.inc
@@ -3,3 +3,5 @@ ramstage-y += model_fxx_init.c
ramstage-y += model_fxx_update_microcode.c
ramstage-y += processor_name.c
ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += powernow_acpi.c
+
+cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c
diff --git a/src/cpu/amd/model_fxx/microcode_blob.c b/src/cpu/amd/model_fxx/microcode_blob.c
new file mode 100644
index 0000000..3d7ee1f
--- /dev/null
+++ b/src/cpu/amd/model_fxx/microcode_blob.c
@@ -0,0 +1,17 @@
+unsigned microcode[] = {
+#if !CONFIG_K8_REV_F_SUPPORT
+ #include "microcode_rev_c.h"
+ #include "microcode_rev_d.h"
+ #include "microcode_rev_e.h"
+#endif
+
+#if CONFIG_K8_REV_F_SUPPORT
+// #include "microcode_rev_f.h"
+#endif
+
+ /* Dummy terminator */
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+};
diff --git a/src/cpu/amd/model_fxx/model_fxx_update_microcode.c b/src/cpu/amd/model_fxx/model_fxx_update_microcode.c
index 4a53fea..307eccc 100644
--- a/src/cpu/amd/model_fxx/model_fxx_update_microcode.c
+++ b/src/cpu/amd/model_fxx/model_fxx_update_microcode.c
@@ -22,24 +22,6 @@
#include <console/console.h>
#include <cpu/amd/microcode.h>
-static uint8_t microcode_updates[] __attribute__ ((aligned(16))) = {
-
-#if !CONFIG_K8_REV_F_SUPPORT
- #include "microcode_rev_c.h"
- #include "microcode_rev_d.h"
- #include "microcode_rev_e.h"
-#endif
-
-#if CONFIG_K8_REV_F_SUPPORT
-// #include "microcode_rev_f.h"
-#endif
- /* Dummy terminator */
- 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0,
-};
-
static unsigned get_equivalent_processor_rev_id(unsigned orig_id) {
static unsigned id_mapping_table[] = {
#if !CONFIG_K8_REV_F_SUPPORT
@@ -91,7 +73,10 @@ void model_fxx_update_microcode(unsigned cpu_deviceid)
unsigned equivalent_processor_rev_id;
/* Update the microcode */
- equivalent_processor_rev_id = get_equivalent_processor_rev_id(cpu_deviceid );
- if(equivalent_processor_rev_id != 0)
- amd_update_microcode(microcode_updates, equivalent_processor_rev_id);
+ equivalent_processor_rev_id = get_equivalent_processor_rev_id(cpu_deviceid);
+ if (equivalent_processor_rev_id != 0) {
+ amd_update_microcode_from_cbfs(equivalent_processor_rev_id);
+ } else {
+ printk(BIOS_DEBUG, "microcode: rev id not found. Skipping microcode patch!\n");
+ }
}
diff --git a/src/include/cpu/amd/microcode.h b/src/include/cpu/amd/microcode.h
index e6d686c..7c9a297 100644
--- a/src/include/cpu/amd/microcode.h
+++ b/src/include/cpu/amd/microcode.h
@@ -1,7 +1,7 @@
#ifndef CPU_AMD_MICROCODE_H
#define CPU_AMD_MICROCODE_H
-void amd_update_microcode(void *microcode_updates, unsigned processor_rev_id);
+void amd_update_microcode_from_cbfs(unsigned processor_rev_id);
void model_fxx_update_microcode(unsigned cpu_deviceid);
#if CONFIG_UPDATE_CPU_MICROCODE
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