[coreboot-gerrit] Patch set updated for coreboot: f94892a cpu/amd/model_fxx/powernow_acpi.c: Comment out set but unused variable `Start_vid`
Paul Menzel (paulepanter@users.sourceforge.net)
gerrit at coreboot.org
Mon Dec 9 22:05:26 CET 2013
Paul Menzel (paulepanter at users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4036
-gerrit
commit f94892a7cec80a6e2d97b7dc9e78cd87d5f079cf
Author: Paul Menzel <paulepanter at users.sourceforge.net>
Date: Tue Oct 29 20:41:50 2013 +0100
cpu/amd/model_fxx/powernow_acpi.c: Comment out set but unused variable `Start_vid`
When adding support for PSS object generation for AMD pre Family Fh CPUs
(199c694f) the function `pstates_algorithm` was copied and adapted, but
`Start_vid` is not needed anymore as a static table is used. I’d remove
the variable, but Ron Minnich requested to leave it there for
documentation purposes. So just comment it out.
Change-Id: I3002951d168cade6461941c16d78373c47792e13
Signed-off-by: Paul Menzel <paulepanter at users.sourceforge.net>
---
src/cpu/amd/model_fxx/powernow_acpi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/cpu/amd/model_fxx/powernow_acpi.c b/src/cpu/amd/model_fxx/powernow_acpi.c
index af1e24b..02e0306 100644
--- a/src/cpu/amd/model_fxx/powernow_acpi.c
+++ b/src/cpu/amd/model_fxx/powernow_acpi.c
@@ -758,7 +758,7 @@ static int pstates_algorithm(u32 pcontrol_blk, u8 plen, u8 onlyBSP)
u16 Pstate_feq[MAXP+1];
u8 Pstate_vid[MAXP+1];
u32 Pstate_power[MAXP+1];
- u8 Max_fid, Start_fid, Start_vid, Max_vid;
+ u8 Max_fid, Start_fid, Max_vid;
struct cpuid_result cpuid1;
/* See if the CPUID(0x80000007) returned EDX[2:1]==11b */
@@ -777,7 +777,7 @@ static int pstates_algorithm(u32 pcontrol_blk, u8 plen, u8 onlyBSP)
Max_fid = (msr.lo & 0x3F0000) >> 16;
Max_vid = (msr.hi & 0x3F0000) >> 16;
Start_fid = (msr.lo & 0x3F00) >> 8;
- Start_vid = (msr.hi & 0x3F00) >> 8;
+ /* Start_vid = (msr.hi & 0x3F00) >> 8; */
cmp_cap =
(pci_read_config16(dev_find_slot(0, PCI_DEVFN(0x18, 3)), 0xE8) &
More information about the coreboot-gerrit
mailing list