[coreboot-gerrit] Patch set updated for coreboot: 4981d35 exynos5420: Fix some clock settings

Patrick Georgi (patrick@georgi-clan.de) gerrit at coreboot.org
Sat Dec 21 10:00:45 CET 2013


Patrick Georgi (patrick at georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4385

-gerrit

commit 4981d3560e3f222b0e4a395e0331694abf9a32d7
Author: Gabe Black <gabeblack at google.com>
Date:   Wed Jul 24 03:57:49 2013 -0700

    exynos5420: Fix some clock settings
    
    Some registers and bit fields were wrong, but the difference is mostly
    academic since the code that uses them are never called.
    
    Change-Id: I0ce5e1529cdda1a4973765af8c31b79130b1111c
    Signed-off-by: Gabe Black <gabeblack at google.com>
    Reviewed-on: https://gerrit.chromium.org/gerrit/63189
    Reviewed-by: David Hendricks <dhendrix at chromium.org>
    Reviewed-by: Hung-Te Lin <hungte at chromium.org>
    Commit-Queue: Gabe Black <gabeblack at chromium.org>
    Tested-by: Gabe Black <gabeblack at chromium.org>
---
 src/cpu/samsung/exynos5420/clock.c | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)

diff --git a/src/cpu/samsung/exynos5420/clock.c b/src/cpu/samsung/exynos5420/clock.c
index 11e46d1..ed5b102 100644
--- a/src/cpu/samsung/exynos5420/clock.c
+++ b/src/cpu/samsung/exynos5420/clock.c
@@ -41,9 +41,9 @@ static struct clk_bit_info clk_bit_info[PERIPH_ID_COUNT] = {
 	{12,	16,	24},
 	{-1,	-1,	-1},
 	{16,	0,	8}, /* PERIPH_ID_SROMC */
-	{20,	16,	24},
-	{24,	0,	8},
-	{0,	0,	4},
+	{20,	20,	24},
+	{24,	24,	8},
+	{28,	28,	4},
 	{4,	12,	16},
 	{-1,	-1,	-1},
 	{-1,	-1,	-1},
@@ -170,12 +170,9 @@ unsigned long clock_get_periph_rate(enum periph_id peripheral)
 		break;
 	case PERIPH_ID_SPI0:
 	case PERIPH_ID_SPI1:
-		src = readl(&clk->clk_src_peric1);
-		div = readl(&clk->clk_div_peric1);
-		break;
 	case PERIPH_ID_SPI2:
 		src = readl(&clk->clk_src_peric1);
-		div = readl(&clk->clk_div_peric2);
+		div = readl(&clk->clk_div_peric1);
 		break;
 	case PERIPH_ID_SPI3:
 	case PERIPH_ID_SPI4:



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