[coreboot-gerrit] Patch set updated for coreboot: c5c95e9 AMD K8 (pre-F): Clean platforms without K8_REV_F_SUPPORT
Kyösti Mälkki (kyosti.malkki@gmail.com)
gerrit at coreboot.org
Mon Dec 23 10:05:14 CET 2013
Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4566
-gerrit
commit c5c95e9530564ee2edcb2c59a78fc49a8c499ec6
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Mon Dec 23 09:56:36 2013 +0200
AMD K8 (pre-F): Clean platforms without K8_REV_F_SUPPORT
Change-Id: Ie109f58bd8ce54754b8d0b00118e75ace8717df0
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
src/mainboard/hp/dl145_g1/romstage.c | 3 ---
src/mainboard/iwill/dk8_htx/romstage.c | 7 -------
src/mainboard/iwill/dk8s2/romstage.c | 7 -------
src/mainboard/iwill/dk8x/romstage.c | 7 -------
4 files changed, 24 deletions(-)
diff --git a/src/mainboard/hp/dl145_g1/romstage.c b/src/mainboard/hp/dl145_g1/romstage.c
index 0ae744f..7185749 100644
--- a/src/mainboard/hp/dl145_g1/romstage.c
+++ b/src/mainboard/hp/dl145_g1/romstage.c
@@ -119,9 +119,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
setup_dl145g1_resource_map();
//setup_default_resource_map();
-#if CONFIG_MEM_TRAIN_SEQ == 1
- set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram
-#endif
setup_coherent_ht_domain();
wait_all_core0_started();
#if CONFIG_LOGICAL_CPUS
diff --git a/src/mainboard/iwill/dk8_htx/romstage.c b/src/mainboard/iwill/dk8_htx/romstage.c
index 6944df0..12c7d6c 100644
--- a/src/mainboard/iwill/dk8_htx/romstage.c
+++ b/src/mainboard/iwill/dk8_htx/romstage.c
@@ -1,7 +1,3 @@
-#if CONFIG_K8_REV_F_SUPPORT
-#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
-#endif
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
@@ -100,9 +96,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");
-#if CONFIG_MEM_TRAIN_SEQ == 1
- set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram
-#endif
setup_coherent_ht_domain(); // routing table and start other core0
wait_all_core0_started();
diff --git a/src/mainboard/iwill/dk8s2/romstage.c b/src/mainboard/iwill/dk8s2/romstage.c
index 940e8a6..29f9265 100644
--- a/src/mainboard/iwill/dk8s2/romstage.c
+++ b/src/mainboard/iwill/dk8s2/romstage.c
@@ -1,7 +1,3 @@
-#if CONFIG_K8_REV_F_SUPPORT
-#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
-#endif
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
@@ -101,9 +97,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");
-#if CONFIG_MEM_TRAIN_SEQ == 1
- set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram
-#endif
setup_coherent_ht_domain(); // routing table and start other core0
wait_all_core0_started();
diff --git a/src/mainboard/iwill/dk8x/romstage.c b/src/mainboard/iwill/dk8x/romstage.c
index bab7760..d50e954 100644
--- a/src/mainboard/iwill/dk8x/romstage.c
+++ b/src/mainboard/iwill/dk8x/romstage.c
@@ -1,7 +1,3 @@
-#if CONFIG_K8_REV_F_SUPPORT
-#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
-#endif
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
@@ -101,9 +97,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");
-#if CONFIG_MEM_TRAIN_SEQ == 1
- set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram
-#endif
setup_coherent_ht_domain(); // routing table and start other core0
wait_all_core0_started();
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