[coreboot-gerrit] New patch to review for coreboot: e3ab008 asrock/imb-a180: Configure the 6 COM ports and the keyboard
Dave Frodin (dave.frodin@se-eng.com)
gerrit at coreboot.org
Thu Dec 26 19:05:19 CET 2013
Dave Frodin (dave.frodin at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4574
-gerrit
commit e3ab008ccaec6119cfd23679f6495935c8aecc61
Author: Dave Frodin <dave.frodin at se-eng.com>
Date: Thu Dec 26 08:24:16 2013 -0700
asrock/imb-a180: Configure the 6 COM ports and the keyboard
Change-Id: I66d0715f3be201f8068acd7097e2be49185bee00
Signed-off-by: Dave Frodin <dave.frodin at se-eng.com>
---
src/mainboard/asrock/imb-a180/Kconfig | 1 +
src/mainboard/asrock/imb-a180/devicetree.cb | 43 ++++++++++++++++++++++++++++-
2 files changed, 43 insertions(+), 1 deletion(-)
diff --git a/src/mainboard/asrock/imb-a180/Kconfig b/src/mainboard/asrock/imb-a180/Kconfig
index 91e83b1..3589041 100644
--- a/src/mainboard/asrock/imb-a180/Kconfig
+++ b/src/mainboard/asrock/imb-a180/Kconfig
@@ -25,6 +25,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select CPU_AMD_AGESA_FAMILY16_KB
select NORTHBRIDGE_AMD_AGESA_FAMILY16_KB
select SOUTHBRIDGE_AMD_AGESA_YANGTZE
+ select SUPERIO_WINBOND_W83627UHG
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
diff --git a/src/mainboard/asrock/imb-a180/devicetree.cb b/src/mainboard/asrock/imb-a180/devicetree.cb
index 3bcaaee..6d6875d 100644
--- a/src/mainboard/asrock/imb-a180/devicetree.cb
+++ b/src/mainboard/asrock/imb-a180/devicetree.cb
@@ -55,7 +55,48 @@ chip northbridge/amd/agesa/family16kb/root_complex
end
end # SM
device pci 14.2 on end # HDA 0x4383
- device pci 14.3 on end # LPC 0x439d
+ device pci 14.3 on
+ chip superio/winbond/w83627uhg
+ device pnp 2e.0 off end # FDC
+ device pnp 2e.1 off end # LPT1
+ device pnp 2e.2 on # COM1
+ io 0x60 = 0x3f8
+ irq 0x70 = 4
+ end
+ device pnp 2e.3 on # COM2
+ io 0x60 = 0x2f8
+ irq 0x70 = 3
+ end
+ device pnp 2e.5 on # KEYBRD
+ io 0x60 = 0x60
+ io 0x62 = 0x64
+ irq 0x70 = 1
+ irq 0x72 = 12
+ end
+ device pnp 2e.6 on # COM3
+ io 0x60 = 0x3e8
+ irq 0x70 = 4
+ end
+ device pnp 2e.7 off end # GPIO
+ device pnp 2e.8 off end # WDT
+ device pnp 2e.9 off end # GPIO
+ device pnp 2e.a off end # ACPI
+ device pnp 2e.b off end # HWMON
+ device pnp 2e.c off end # PECI
+ device pnp 2e.d on # COM4
+ io 0x60 = 0x2e8
+ irq 0x70 = 3
+ end
+ device pnp 2e.e on # COM5
+ io 0x60 = 0x3e0
+ irq 0x70 = 4
+ end
+ device pnp 2e.f on # COM6
+ io 0x60 = 0x2e0
+ irq 0x70 = 3
+ end
+ end # w83627uhg
+ end # LPC 0x439d
device pci 14.7 on end # SD
end #chip southbridge/amd/hudson
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