[coreboot-gerrit] Patch set updated for coreboot: 893a0aa usbdebug: Put ehci_debug_info in CAR_GLOBAL

Tue Jul 9 16:46:29 CEST 2013

Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3475

-gerrit

commit 893a0aabf577a217ef54018e9ca77a87a35f5f2f
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Sat Jul 6 11:41:09 2013 +0300

    usbdebug: Put ehci_debug_info in CAR_GLOBAL
    
    Store EHCI Debug Port runtime variables in CAR_GLOBAL.
    For platforms without CAR_MIGRATION, logging on EHCI Debug Port is
    temporarily lost when CAR is torn down at end of romstage.
    
    On model_2065x and model_206ax ehci_debug_info was overlapping the MRC
    variable region and additionally migration used incorrect size for
    the structure.
    
    Change-Id: I5e6c613b8a4b1dda43d5b69bd437753108760fca
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/cpu/intel/car/cache_as_ram_ht.inc      |  5 -----
 src/cpu/intel/haswell/cache_as_ram.inc     |  9 ---------
 src/cpu/intel/model_2065x/cache_as_ram.inc |  9 ---------
 src/cpu/intel/model_206ax/cache_as_ram.inc |  9 ---------
 src/cpu/intel/model_6ex/cache_as_ram.inc   |  5 -----
 src/lib/usbdebug.c                         | 18 +++++++-----------
 6 files changed, 7 insertions(+), 48 deletions(-)

diff --git a/src/cpu/intel/car/cache_as_ram_ht.inc b/src/cpu/intel/car/cache_as_ram_ht.inc
index 8a845e9..fe1e29a 100644
--- a/src/cpu/intel/car/cache_as_ram_ht.inc
+++ b/src/cpu/intel/car/cache_as_ram_ht.inc
@@ -334,12 +334,7 @@ no_msr_11e:
 	post_code(0x2e)
 
 	/* Set up the stack pointer. */
-#if CONFIG_USBDEBUG
-	/* Leave some space for the struct ehci_debug_info. */
-	movl	$(CACHE_AS_RAM_BASE + CACHE_AS_RAM_SIZE - 4 - 128), %esp
-#else
 	movl	$(CACHE_AS_RAM_BASE + CACHE_AS_RAM_SIZE - 4), %esp
-#endif
 
 	/* Restore the BIST result. */
 	movl	%ebp, %eax
diff --git a/src/cpu/intel/haswell/cache_as_ram.inc b/src/cpu/intel/haswell/cache_as_ram.inc
index 8601f46..2d1e86f 100644
--- a/src/cpu/intel/haswell/cache_as_ram.inc
+++ b/src/cpu/intel/haswell/cache_as_ram.inc
@@ -190,15 +190,6 @@ before_romstage:
 
 	post_code(0x2f)
 
-	/* Copy global variable space (for USBDEBUG) to memory */
-#if CONFIG_USBDEBUG
-	cld
-	movl	$(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - 24), %esi
-	movl	$(CONFIG_RAMTOP - 24), %edi
-	movl	$24, %ecx
-	rep	movsb
-#endif
-
 	post_code(0x30)
 
 	/* Disable cache. */
diff --git a/src/cpu/intel/model_2065x/cache_as_ram.inc b/src/cpu/intel/model_2065x/cache_as_ram.inc
index db0eaae..ec7335e 100644
--- a/src/cpu/intel/model_2065x/cache_as_ram.inc
+++ b/src/cpu/intel/model_2065x/cache_as_ram.inc
@@ -182,15 +182,6 @@ before_romstage:
 
 	post_code(0x2f)
 
-	/* Copy global variable space (for USBDEBUG) to memory */
-#if CONFIG_USBDEBUG
-	cld
-	movl	$(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - 24), %esi
-	movl	$(CONFIG_RAMTOP - 24), %edi
-	movl	$24, %ecx
-	rep	movsb
-#endif
-
 	post_code(0x30)
 
 	/* Disable cache. */
diff --git a/src/cpu/intel/model_206ax/cache_as_ram.inc b/src/cpu/intel/model_206ax/cache_as_ram.inc
index 2652cb7..b4119cc 100644
--- a/src/cpu/intel/model_206ax/cache_as_ram.inc
+++ b/src/cpu/intel/model_206ax/cache_as_ram.inc
@@ -182,15 +182,6 @@ before_romstage:
 
 	post_code(0x2f)
 
-	/* Copy global variable space (for USBDEBUG) to memory */
-#if CONFIG_USBDEBUG
-	cld
-	movl	$(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - 24), %esi
-	movl	$(CONFIG_RAMTOP - 24), %edi
-	movl	$24, %ecx
-	rep	movsb
-#endif
-
 	post_code(0x30)
 
 	/* Disable cache. */
diff --git a/src/cpu/intel/model_6ex/cache_as_ram.inc b/src/cpu/intel/model_6ex/cache_as_ram.inc
index 50fab35..ac3c66b 100644
--- a/src/cpu/intel/model_6ex/cache_as_ram.inc
+++ b/src/cpu/intel/model_6ex/cache_as_ram.inc
@@ -126,12 +126,7 @@ clear_mtrrs:
 	movl	%eax, %cr0
 
 	/* Set up the stack pointer. */
-#if CONFIG_USBDEBUG
-	/* Leave some space for the struct ehci_debug_info. */
-	movl	$(CACHE_AS_RAM_BASE + CACHE_AS_RAM_SIZE - 4 - 128), %eax
-#else
 	movl	$(CACHE_AS_RAM_BASE + CACHE_AS_RAM_SIZE - 4), %eax
-#endif
 	movl	%eax, %esp
 
 	/* Restore the BIST result. */
diff --git a/src/lib/usbdebug.c b/src/lib/usbdebug.c
index 8f55542..f3c0d05 100644
--- a/src/lib/usbdebug.c
+++ b/src/lib/usbdebug.c
@@ -23,6 +23,7 @@
 #include <arch/io.h>
 #include <device/pci.h>
 #include <arch/byteorder.h>
+#include <cpu/x86/car.h>
 
 #include <usb_ch9.h>
 #include <ehci.h>
@@ -87,8 +88,8 @@
 #define DBGP_MAX_PACKET		8
 #define DBGP_LOOPS 1000
 
+static struct ehci_debug_info glob_dbg_info CAR_GLOBAL;
 #if !defined(__PRE_RAM__) && !defined(__SMM__)
-static struct ehci_debug_info glob_dbg_info;
 static struct device_operations *ehci_drv_ops;
 static struct device_operations ehci_dbg_ops;
 #endif
@@ -602,7 +603,7 @@ void usbdebug_tx_flush(struct ehci_debug_info *dbg_info)
 #if !defined(__PRE_RAM__) && !defined(__SMM__)
 static void usbdebug_re_enable(unsigned ehci_base)
 {
-	struct ehci_debug_info *dbg_info = dbgp_ehci_info();
+	struct ehci_debug_info *dbg_info = car_get_var_ptr(&glob_dbg_info);
 	unsigned diff;
 
 	if (!dbg_info->ehci_debug)
@@ -617,7 +618,7 @@ static void usbdebug_re_enable(unsigned ehci_base)
 
 static void usbdebug_disable(void)
 {
-	struct ehci_debug_info *dbg_info = dbgp_ehci_info();
+	struct ehci_debug_info *dbg_info = car_get_var_ptr(&glob_dbg_info);
 	dbg_info->status &= ~DBGP_EP_ENABLED;
 }
 
@@ -662,18 +663,13 @@ int dbgp_ep_is_active(struct ehci_debug_info *dbg_info)
 
 struct ehci_debug_info *dbgp_ehci_info(void)
 {
-#if __PRE_RAM__
-	/* "Find" dbg_info structure in Cache */
-	return (struct ehci_debug_info *)
-	    (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - sizeof(struct ehci_debug_info));
-#else
-	return &glob_dbg_info;
-#endif
+	return car_get_var_ptr(&glob_dbg_info);
 }
 
 int usbdebug_init(void)
 {
-	struct ehci_debug_info *dbg_info = dbgp_ehci_info();
+	struct ehci_debug_info *dbg_info = car_get_var_ptr(&glob_dbg_info);
+
 #if defined(__PRE_RAM__) || !CONFIG_EARLY_CONSOLE
 	enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
 #endif

