[coreboot-gerrit] Patch set updated for coreboot: d93aa23 exynos5250: Clear the framebuffer before making it uncacheable.

Gabe Black (gabeblack@chromium.org) gerrit at coreboot.org
Tue Jul 9 22:43:40 CEST 2013


Gabe Black (gabeblack at chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3655

-gerrit

commit d93aa23b710dde6d1074223a17f759ae038a60fe
Author: Gabe Black <gabeblack at google.com>
Date:   Sat May 18 23:06:47 2013 -0700

    exynos5250: Clear the framebuffer before making it uncacheable.
    
    If we clear the framebuffer and then flush it back to memory using cache
    operations, the writes are going to be full cachelines at a time. If we make
    it uncacheable first, the writes will be serialized writes of whatever sized
    chunks memset uses, probably 4 bytes or less.
    
    Change-Id: I1b81731cfed00ae091ba6357451ab186d16f559e
    Signed-off-by: Gabe Black <gabeblack at chromium.org>
---
 src/cpu/samsung/exynos5250/cpu.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/cpu/samsung/exynos5250/cpu.c b/src/cpu/samsung/exynos5250/cpu.c
index d2a6df7..3687ea8 100644
--- a/src/cpu/samsung/exynos5250/cpu.c
+++ b/src/cpu/samsung/exynos5250/cpu.c
@@ -97,6 +97,8 @@ static void exynos_displayport_init(device_t dev)
 	lcdbase = (uintptr_t)cbmem_add(CBMEM_ID_CONSOLE, fb_size);
 	printk(BIOS_SPEW, "LCD framebuffer base is %p\n", (void *)(lcdbase));
 
+	memset((void *)lcdbase, 0, fb_size);	/* clear the framebuffer */
+
 	/*
 	 * We need to clean and invalidate the framebuffer region and disable
 	 * caching as well. We assume that our dcache <--> memory address
@@ -114,7 +116,6 @@ static void exynos_displayport_init(device_t dev)
 	mmio_resource(dev, 1, lcdbase/KiB, (fb_size + KiB - 1)/KiB);
 	printk(BIOS_DEBUG,
 	       "Initializing Exynos VGA, base %p\n", (void *)lcdbase);
-	memset((void *)lcdbase, 0, fb_size);	/* clear the framebuffer */
 	ret = lcd_ctrl_init(fb_size, &panel, (void *)lcdbase);
 }
 



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