[coreboot-gerrit] Patch set updated for coreboot: f9132ae ARMv7: Clean up console code
Gabe Black (gabeblack@chromium.org)
gerrit at coreboot.org
Wed Jul 10 14:32:14 CEST 2013
Gabe Black (gabeblack at chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3647
-gerrit
commit f9132ae86fefbc5bb78ba3d7b646e42166cfea8e
Author: Stefan Reinauer <reinauer at chromium.org>
Date: Thu May 16 10:57:15 2013 -0700
ARMv7: Clean up console code
- Guard console_init() with CONFIG_EARLY_CONSOLE in bootblock
- Don't initialize console twice in the bootblock
- remove printk in memory init that would mess up the UART
- unconditionally run console_init() in romstage, as it is
also unconditionally run in the bootblock.
Change-Id: I8f0d60877433162367074d0e55e01f935fd81f8e
Signed-off-by: Stefan Reinauer <reinauer at google.com>
Signed-off-by: Gabe Black <gabeblack at chromium.org>
---
src/arch/armv7/bootblock_simple.c | 6 +++---
src/cpu/samsung/exynos5250/bootblock.c | 3 ---
src/mainboard/google/snow/memory.c | 1 -
src/mainboard/google/snow/romstage.c | 5 +++--
4 files changed, 6 insertions(+), 9 deletions(-)
diff --git a/src/arch/armv7/bootblock_simple.c b/src/arch/armv7/bootblock_simple.c
index 46e9d41..5d0fe7e 100644
--- a/src/arch/armv7/bootblock_simple.c
+++ b/src/arch/armv7/bootblock_simple.c
@@ -68,12 +68,12 @@ void main(void)
bootblock_mainboard_init();
}
+#ifdef CONFIG_EARLY_CONSOLE
console_init();
- printk(BIOS_INFO, "hello from bootblock\n");
- printk(BIOS_INFO, "bootblock main(): loading romstage\n");
+#endif
+
entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, stage_name);
- printk(BIOS_INFO, "bootblock main(): jumping to romstage\n");
if (entry) stage_exit(entry);
hlt();
}
diff --git a/src/cpu/samsung/exynos5250/bootblock.c b/src/cpu/samsung/exynos5250/bootblock.c
index f523428..d3d737e 100644
--- a/src/cpu/samsung/exynos5250/bootblock.c
+++ b/src/cpu/samsung/exynos5250/bootblock.c
@@ -17,7 +17,6 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#include <console/console.h>
#include "clk.h"
#include "wakeup.h"
@@ -38,6 +37,4 @@ void bootblock_cpu_init(void)
* (ex, SPI, SD/MMC, or eMMC) now; but for Exynos platform, that is
* already handled by iROM so there's no need to setup again.
*/
-
- console_init();
}
diff --git a/src/mainboard/google/snow/memory.c b/src/mainboard/google/snow/memory.c
index 9a1fbed..af04cbd 100644
--- a/src/mainboard/google/snow/memory.c
+++ b/src/mainboard/google/snow/memory.c
@@ -490,7 +490,6 @@ static int board_get_config(void)
id1 = gpio_read_mvl3(BOARD_ID1_GPIO);
if (id0 < 0 || id1 < 0)
return -1;
- printk(BIOS_DEBUG, "%s: id0: %u, id1: %u\n", __func__, id0, id1);
for (i = 0; i < ARRAY_SIZE(id_map); i++) {
if (id0 == id_map[i].id0 && id1 == id_map[i].id1) {
diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c
index a7d6bb0..ec810ce 100644
--- a/src/mainboard/google/snow/romstage.c
+++ b/src/mainboard/google/snow/romstage.c
@@ -129,7 +129,7 @@ static void setup_gpio(void)
static void setup_memory(struct mem_timings *mem, int is_resume)
{
- printk(BIOS_SPEW, "man: 0x%x type: 0x%x, div: 0x%x, mhz: 0x%x\n",
+ printk(BIOS_SPEW, "man: 0x%x type: 0x%x, div: 0x%x, mhz: %d\n",
mem->mem_manuf,
mem->mem_type,
mem->mpll_mdiv,
@@ -168,8 +168,9 @@ void main(void)
* to re-initialize serial console drivers again. */
mem = setup_clock();
+ console_init();
+
if (!is_resume) {
- console_init();
setup_power();
}
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