[coreboot-gerrit] Patch merged into coreboot/master: e42030d arm/exynos: Correct SPI session commands.

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit e42030d23600990e95db2af1e9e1a366ff3d4ec7
Author: Hung-Te Lin <hungte at chromium.org>
Date:   Sun Jun 23 08:14:30 2013 +0800

    arm/exynos: Correct SPI session commands.
    
    Some initialization / shutdown commands should be paired correctly in a SPI I/O
    session. For example, setting CS should be enabled and disabled in each read;
    and the bus width (byte or word) should be configured only when opening /
    closing the SPI device.
    
    Change-Id: Ie56b1c3a6df7d542f7ea8f1193ac435987f937ba
    Signed-off-by: Hung-Te Lin <hungte at chromium.org>
    Signed-off-by: Gabe Black <gabeblack at chromium.org>
    Reviewed-on: http://review.coreboot.org/3706
    Tested-by: build bot (Jenkins)
    Reviewed-by: Stefan Reinauer <stefan.reinauer at coreboot.org>


See http://review.coreboot.org/3706 for details.

-gerrit