[coreboot-gerrit] Patch merged into coreboot/master: cab3621 armv7/exynos5420: Revise SPI open/close/reset procedure.

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit cab3621446542fadf67e9406c4ae39fb63a0536f
Author: Hung-Te Lin <hungte at chromium.org>
Date:   Wed Jun 26 20:22:50 2013 +0800

    armv7/exynos5420: Revise SPI open/close/reset procedure.
    
    The original Exynos SPI open/close procedure was copied from U-Boot SPL with
    some assumptions that only works in SPL stage.  For example, it tries to always
    work in 4-byte transmission mode with only RX data is swapped, and claims a
    packet for initial address command (and with incorrect size).
    
    This commit revises open/close and reset so only the required SPI registers are
    configured.
    
    Change-Id: Ieba1f03d80a8949c39a6658218831ded39853744
    Signed-off-by: Hung-Te Lin <hungte at chromium.org>
    Signed-off-by: Gabe Black <gabeblack at chromium.org>
    Reviewed-on: http://review.coreboot.org/3712
    Tested-by: build bot (Jenkins)
    Reviewed-by: Stefan Reinauer <stefan.reinauer at coreboot.org>


See http://review.coreboot.org/3712 for details.

-gerrit