[coreboot-gerrit] Patch merged into coreboot/master: 8644207 armv7/exynos5420: Add output ability and half-duplex mode in SPI driver.
gerrit at coreboot.org
gerrit at coreboot.org
Wed Jul 10 23:17:40 CEST 2013
the following patch was just integrated into master:
commit 864420766ad85c8ed0dd98aefd8f527aeb506aa5
Author: Hung-Te Lin <hungte at chromium.org>
Date: Wed Jun 26 20:29:06 2013 +0800
armv7/exynos5420: Add output ability and half-duplex mode in SPI driver.
The SPI driver (exynos_spi_rx_tx) was implemented with only "read" ability and
only full-duplex mode. To communicate with devices like ChromeOS EC, we need
both output (tx) and half-duplex (searching frame header) features.
This commit adds a spi_rx_tx that can handle all cases we need.
Change-Id: I6aba3839eb0711d49c143dc0620245c0dfe782d8
Signed-off-by: Hung-Te Lin <hungte at chromium.org>
Signed-off-by: Gabe Black <gabeblack at chromium.org>
Reviewed-on: http://review.coreboot.org/3713
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer at coreboot.org>
See http://review.coreboot.org/3713 for details.
-gerrit
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