[coreboot-gerrit] Patch set updated for coreboot: 8c64bb6 cpu/amd/agesa/Kconfig: Add MMCONF_SUPPORT_DEFAULT

[Paul Menzel (paulepanter@users.sourceforge.net)]

Paul Menzel (paulepanter at users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3767

-gerrit

commit 8c64bb6520b9b18f615db7eec3d14afd3e39b291
Author: Paul Menzel <paulepanter at users.sourceforge.net>
Date:   Sat Jul 13 21:00:36 2013 +0200

    cpu/amd/agesa/Kconfig: Add MMCONF_SUPPORT_DEFAULT
    
    Move `amdinitmmio()` before `console_init()` in `romstag.c` as no
    PCI confgs are allowed before the BAR is enabled wtih `MMCONF_BASE_ADDRESS`.
    
    		printk(BIOS_DEBUG, "agesawrapper_amdinitmmio ");
    
    Tested on ASRock E350M1 for the beginning and needs to be extended
    to all other boards.
    
    `src/southbridge/amd/cimx/sb800/bootblock.c` needs to be checked too.
    
    Change-Id: I6dfd9809a74eb498182511c76434512c655c173f
    Signed-off-by: Paul Menzel <paulepanter at users.sourceforge.net>
---
 src/cpu/amd/agesa/Kconfig              |  1 +
 src/mainboard/asrock/e350m1/romstage.c | 11 +++--------
 2 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/src/cpu/amd/agesa/Kconfig b/src/cpu/amd/agesa/Kconfig
index c660470..baf8e02 100644
--- a/src/cpu/amd/agesa/Kconfig
+++ b/src/cpu/amd/agesa/Kconfig
@@ -28,6 +28,7 @@ config CPU_AMD_AGESA
 	select TSC_SYNC_LFENCE
 	select UDELAY_LAPIC
 	select LAPIC_MONOTONIC_TIMER
+	select MMCONF_SUPPORT_DEFAULT
 
 if CPU_AMD_AGESA
 
diff --git a/src/mainboard/asrock/e350m1/romstage.c b/src/mainboard/asrock/e350m1/romstage.c
index 7e806fa..249610a 100644
--- a/src/mainboard/asrock/e350m1/romstage.c
+++ b/src/mainboard/asrock/e350m1/romstage.c
@@ -60,6 +60,9 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 		sb_Poweron_Init();
 
 		post_code(0x31);
+		agesawrapper_amdinitmmio();
+
+		post_code(0x32);
 		w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 		console_init();
 	}
@@ -73,14 +76,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val);
 	printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx);
 
-	post_code(0x35);
-	printk(BIOS_DEBUG, "agesawrapper_amdinitmmio ");
-	val = agesawrapper_amdinitmmio();
-	if (val)
-		printk(BIOS_DEBUG, "error level: %x \n", val);
-	else
-		printk(BIOS_DEBUG, "passed.\n");
-
 	post_code(0x37);
 	printk(BIOS_DEBUG, "agesawrapper_amdinitreset ");
 	val = agesawrapper_amdinitreset();