[coreboot-gerrit] Patch set updated for coreboot: 0902148 spd.h: Add all known SPD_MEMORY_TYPE definitions.

Alexandru Gagniuc (mr.nuke.me@gmail.com) gerrit at coreboot.org
Mon Jun 3 21:12:03 CEST 2013


Alexandru Gagniuc (mr.nuke.me at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3266

-gerrit

commit 09021486f3049203d764ea34dc7dfd182ec09837
Author: Alexandru Gagniuc <mr.nuke.me at gmail.com>
Date:   Tue May 21 14:07:41 2013 -0500

    spd.h: Add all known SPD_MEMORY_TYPE definitions.
    
    This file was missing some definitions, so add them. Also turn the defines
    into an enum. The reason for doing this is that functions can now
    explicitly take an spd_memory_type as a parameter:
    
    > int do_something_with_dram(enum spd_memory_type type, ...)
    
    Which is a lot more explicit and readable than:
    
    > int do_something_with_dram(u8 type, ...)
    
    These are used in the VX900 branch.
    
    Change-Id: Ic7871e82c2523a94eac8e07979a8e34e0b459b46
    Signed-off-by: Alexandru Gagniuc <mr.nuke.me at gmail.com>
---
 src/include/spd.h | 23 ++++++++++++++---------
 1 file changed, 14 insertions(+), 9 deletions(-)

diff --git a/src/include/spd.h b/src/include/spd.h
index e8d35cf..2b07fb1 100644
--- a/src/include/spd.h
+++ b/src/include/spd.h
@@ -108,15 +108,20 @@
 
 
 /* SPD_MEMORY_TYPE values. */
-#define SPD_MEMORY_TYPE_FPM_DRAM         1
-#define SPD_MEMORY_TYPE_EDO              2
-#define SPD_MEMORY_TYPE_PIPELINED_NIBBLE 3
-#define SPD_MEMORY_TYPE_SDRAM            4
-#define SPD_MEMORY_TYPE_MULTIPLEXED_ROM  5
-#define SPD_MEMORY_TYPE_SGRAM_DDR        6
-#define SPD_MEMORY_TYPE_SDRAM_DDR        7
-#define SPD_MEMORY_TYPE_SDRAM_DDR2       8
-#define SPD_MEMORY_TYPE_SDRAM_DDR3       0xb
+enum spd_memory_type {
+	SPD_MEMORY_TYPE_UNDEFINED		= 0x00,
+	SPD_MEMORY_TYPE_FPM_DRAM		= 0x01,
+	SPD_MEMORY_TYPE_EDO			= 0x02,
+	SPD_MEMORY_TYPE_PIPELINED_NIBBLE	= 0x03,
+	SPD_MEMORY_TYPE_SDRAM			= 0x04,
+	SPD_MEMORY_TYPE_MULTIPLEXED_ROM		= 0x05,
+	SPD_MEMORY_TYPE_SGRAM_DDR		= 0x06,
+	SPD_MEMORY_TYPE_SDRAM_DDR		= 0x07,
+	SPD_MEMORY_TYPE_SDRAM_DDR2		= 0x08,
+	SPD_MEMORY_TYPE_FBDIMM_DDR2		= 0x09,
+	SPD_MEMORY_TYPE_FB_PROBE_DDR2		= 0x0a,
+	SPD_MEMORY_TYPE_SDRAM_DDR3		= 0x0b,
+};
 
 /* SPD_MODULE_VOLTAGE values. */
 #define SPD_VOLTAGE_TTL                  0 /* 5.0 Volt/TTL */



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