[coreboot-gerrit] New patch to review for coreboot: 50e166d AMD S3 resume: use a function to replace duplicated code
Siyuan Wang (wangsiyuanbuaa@gmail.com)
gerrit at coreboot.org
Fri Jun 7 09:35:21 CEST 2013
Siyuan Wang (wangsiyuanbuaa at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3410
-gerrit
commit 50e166d33e7947f12bd48f26e112b9205f24d762
Author: Siyuan Wang <wangsiyuanbuaa at gmail.com>
Date: Fri Jun 7 14:31:19 2013 +0800
AMD S3 resume: use a function to replace duplicated code
In function OemAgesaSaveMtrr of 'src/cpu/amd/agesa/s3_resume.c',
there are many code like this:
msr_data = rdmsr(0x258);
flash->write(flash, nvram_pos, 4, &msr_data.lo);
nvram_pos += 4;
flash->write(flash, nvram_pos, 4, &msr_data.hi);
nvram_pos += 4;
Add a function write_mtrr to do this.
Change-Id: Id6464e637db1758b07ac2d79d3be1375a8d49651
Signed-off-by: Siyuan Wang <SiYuan.Wang at amd.com>
Signed-off-by: Siyuan Wang <wangsiyuanbuaa at gmail.com>
---
src/cpu/amd/agesa/s3_resume.c | 73 ++++++++++++++-----------------------------
src/cpu/amd/agesa/s3_resume.h | 5 +++
2 files changed, 28 insertions(+), 50 deletions(-)
diff --git a/src/cpu/amd/agesa/s3_resume.c b/src/cpu/amd/agesa/s3_resume.c
index ada4d3c..8a9ffee 100644
--- a/src/cpu/amd/agesa/s3_resume.c
+++ b/src/cpu/amd/agesa/s3_resume.c
@@ -147,6 +147,18 @@ void move_stack_high_mem(void)
:);
}
+#ifndef __PRE_RAM__
+void write_mtrr(struct spi_flash *flash, u32 *p_nvram_pos, unsigned idx)
+{
+ msr_t msr_data;
+ msr_data = rdmsr(idx);
+ flash->write(flash, *p_nvram_pos, 4, &msr_data.lo);
+ *p_nvram_pos += 4;
+ flash->write(flash, *p_nvram_pos, 4, &msr_data.hi);
+ *p_nvram_pos += 4;
+}
+#endif
+
void OemAgesaSaveMtrr(void)
{
#ifndef __PRE_RAM__
@@ -174,32 +186,12 @@ void OemAgesaSaveMtrr(void)
wrmsr(SYS_CFG, msr_data);
/* Fixed MTRRs */
- msr_data = rdmsr(0x250);
-
- flash->write(flash, nvram_pos, 4, &msr_data.lo);
- nvram_pos += 4;
- flash->write(flash, nvram_pos, 4, &msr_data.hi);
- nvram_pos += 4;
-
- msr_data = rdmsr(0x258);
- flash->write(flash, nvram_pos, 4, &msr_data.lo);
- nvram_pos += 4;
- flash->write(flash, nvram_pos, 4, &msr_data.hi);
- nvram_pos += 4;
-
- msr_data = rdmsr(0x259);
- flash->write(flash, nvram_pos, 4, &msr_data.lo);
- nvram_pos += 4;
- flash->write(flash, nvram_pos, 4, &msr_data.hi);
- nvram_pos += 4;
-
- for (i = 0x268; i < 0x270; i++) {
- msr_data = rdmsr(i);
- flash->write(flash, nvram_pos, 4, &msr_data.lo);
- nvram_pos += 4;
- flash->write(flash, nvram_pos, 4, &msr_data.hi);
- nvram_pos += 4;
- }
+ write_mtrr(flash, &nvram_pos, 0x250);
+ write_mtrr(flash, &nvram_pos, 0x258);
+ write_mtrr(flash, &nvram_pos, 0x259);
+
+ for (i = 0x268; i < 0x270; i++)
+ write_mtrr(flash, &nvram_pos, i);
/* Disable access to AMD RdDram and WrDram extension bits */
msr_data = rdmsr(SYS_CFG);
@@ -207,34 +199,15 @@ void OemAgesaSaveMtrr(void)
wrmsr(SYS_CFG, msr_data);
/* Variable MTRRs */
- for (i = 0x200; i < 0x210; i++) {
- msr_data = rdmsr(i);
- flash->write(flash, nvram_pos, 4, &msr_data.lo);
- nvram_pos += 4;
- flash->write(flash, nvram_pos, 4, &msr_data.hi);
- nvram_pos += 4;
- }
+ for (i = 0x200; i < 0x210; i++)
+ write_mtrr(flash, &nvram_pos, i);
/* SYS_CFG */
- msr_data = rdmsr(0xC0010010);
- flash->write(flash, nvram_pos, 4, &msr_data.lo);
- nvram_pos += 4;
- flash->write(flash, nvram_pos, 4, &msr_data.hi);
- nvram_pos += 4;
-
+ write_mtrr(flash, &nvram_pos, 0xC0010010);
/* TOM */
- msr_data = rdmsr(0xC001001A);
- flash->write(flash, nvram_pos, 4, &msr_data.lo);
- nvram_pos += 4;
- flash->write(flash, nvram_pos, 4, &msr_data.hi);
- nvram_pos += 4;
-
+ write_mtrr(flash, &nvram_pos, 0xC001001A);
/* TOM2 */
- msr_data = rdmsr(0xC001001D);
- flash->write(flash, nvram_pos, 4, &msr_data.lo);
- nvram_pos += 4;
- flash->write(flash, nvram_pos, 4, &msr_data.hi);
- nvram_pos += 4;
+ write_mtrr(flash, &nvram_pos, 0xC001001D);
flash->spi->rw = SPI_WRITE_FLAG;
spi_release_bus(flash->spi);
diff --git a/src/cpu/amd/agesa/s3_resume.h b/src/cpu/amd/agesa/s3_resume.h
index 441e952..b04df8d 100644
--- a/src/cpu/amd/agesa/s3_resume.h
+++ b/src/cpu/amd/agesa/s3_resume.h
@@ -49,6 +49,11 @@ u32 OemAgesaSaveS3Info (S3_DATA_TYPE S3DataType, u32 DataSize, void *Data);
void OemAgesaGetS3Info (S3_DATA_TYPE S3DataType, u32 *DataSize, void **Data);
void OemAgesaSaveMtrr (void);
+#ifndef __PRE_RAM__
+struct spi_flash;
+void write_mtrr(struct spi_flash *flash, u32 *p_nvram_pos, unsigned idx);
+#endif
+
#endif
#endif
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