[coreboot-gerrit] New patch to review for coreboot: 9a52cb7 armv7: invalid TLB entries as they are added/modified

[David Hendricks (dhendrix@chromium.org)]

David Hendricks (dhendrix at chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3166

-gerrit

commit 9a52cb7be3545c1e290a4a9341eef5939a41b98f
Author: David Hendricks <dhendrix at chromium.org>
Date:   Tue Apr 30 16:01:50 2013 -0700

    armv7: invalid TLB entries as they are added/modified
    
    The old approach was to invalidate the entire TLB every time we set up
    a table entry. This worked because we didn't turn the MMU on until
    after we had set everything up. Using the TLBIMVAA instruction to
    invalidate each entry as it's added/modified is more correct.
    
    Change-Id: I27654a543a2015574d910e15d48b3d3845fdb6d1
    Signed-off-by: David Hendricks <dhendrix at chromium.org>
---
 src/arch/armv7/lib/mmu.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/src/arch/armv7/lib/mmu.c b/src/arch/armv7/lib/mmu.c
index 82c7358..d4e08f7 100644
--- a/src/arch/armv7/lib/mmu.c
+++ b/src/arch/armv7/lib/mmu.c
@@ -99,11 +99,10 @@ void mmu_config_range(unsigned long start_mb, unsigned long size_mb,
 	printk(BIOS_DEBUG, "Setting dcache policy: 0x%08lx:0x%08lx [%s]\n",
 			start_mb << 20, ((start_mb + size_mb) << 20) - 1, str);
 
-	for (i = start_mb; i < start_mb + size_mb; i++)
+	for (i = start_mb; i < start_mb + size_mb; i++) {
 		ttb_entry[i] = (i << 20) | attr;
-
-	/* TODO: add helper to invalidate TLB by MVA */
-	tlb_invalidate_all();
+		tlbimvaa(start_mb);
+	}
 }
 
 void mmu_init(void)