[coreboot-gerrit] Patch merged into coreboot/master: 7cb1ba9 haswell: use tsc for udelay()

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 7cb1ba9a61b244800eb65c08729f75d85a504de3
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Wed May 1 15:39:28 2013 -0500

    haswell: use tsc for udelay()
    
    Instead of using the local apic timer for udelay() use the tsc.
    That way SMM, romstage, and ramstage all use the same delay
    functionality.
    
    Change-Id: I024de5af01eb5de09318e13d0428ee98c132f594
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-on: http://review.coreboot.org/3169
    Tested-by: build bot (Jenkins)
    Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>
    Reviewed-by: Ronald G. Minnich <rminnich at gmail.com>

Build-Tested: build bot (Jenkins) at Tue May  7 13:26:03 2013, giving +1
Reviewed-By: Ronald G. Minnich <rminnich at gmail.com> at Tue May  7 18:32:40 2013, giving +2
See http://review.coreboot.org/3169 for details.

-gerrit